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    <title>topic Sometimes access to some MSR in Software Tuning, Performance Optimization &amp; Platform Monitoring</title>
    <link>https://community.intel.com/t5/Software-Tuning-Performance/Disabling-Hardware-Prefetch-and-Adjacent-Cache-Line-Fetch-in/m-p/965531#M2638</link>
    <description>&lt;P&gt;Sometimes access to some MSR registers is locked even&amp;nbsp; from kernel mode.If I am not wrong some functionality can be accessed by switching to SMM mode.&lt;/P&gt;</description>
    <pubDate>Thu, 01 Aug 2013 17:16:19 GMT</pubDate>
    <dc:creator>Bernard</dc:creator>
    <dc:date>2013-08-01T17:16:19Z</dc:date>
    <item>
      <title>Disabling Hardware Prefetch and Adjacent Cache Line Fetch in Sandy/Ivy Bridge without BIOS Support</title>
      <link>https://community.intel.com/t5/Software-Tuning-Performance/Disabling-Hardware-Prefetch-and-Adjacent-Cache-Line-Fetch-in/m-p/965530#M2637</link>
      <description>&lt;P&gt;Hi, I have 2 computers with sandy bridge-e and ivy bridge processors respectively and neither one them have BIOS options for disabling hardware prefetch and the adjacent cache line fetch options.&lt;/P&gt;
&lt;P&gt;Is there any way (i.e. a MSR, etc) to disable these options in the processor?&lt;/P&gt;
&lt;P&gt;Thanks!&lt;/P&gt;
&lt;P&gt;Adam&lt;/P&gt;</description>
      <pubDate>Wed, 31 Jul 2013 21:31:06 GMT</pubDate>
      <guid>https://community.intel.com/t5/Software-Tuning-Performance/Disabling-Hardware-Prefetch-and-Adjacent-Cache-Line-Fetch-in/m-p/965530#M2637</guid>
      <dc:creator>Adam_J_3</dc:creator>
      <dc:date>2013-07-31T21:31:06Z</dc:date>
    </item>
    <item>
      <title>Sometimes access to some MSR</title>
      <link>https://community.intel.com/t5/Software-Tuning-Performance/Disabling-Hardware-Prefetch-and-Adjacent-Cache-Line-Fetch-in/m-p/965531#M2638</link>
      <description>&lt;P&gt;Sometimes access to some MSR registers is locked even&amp;nbsp; from kernel mode.If I am not wrong some functionality can be accessed by switching to SMM mode.&lt;/P&gt;</description>
      <pubDate>Thu, 01 Aug 2013 17:16:19 GMT</pubDate>
      <guid>https://community.intel.com/t5/Software-Tuning-Performance/Disabling-Hardware-Prefetch-and-Adjacent-Cache-Line-Fetch-in/m-p/965531#M2638</guid>
      <dc:creator>Bernard</dc:creator>
      <dc:date>2013-08-01T17:16:19Z</dc:date>
    </item>
    <item>
      <title>Hello Adam,</title>
      <link>https://community.intel.com/t5/Software-Tuning-Performance/Disabling-Hardware-Prefetch-and-Adjacent-Cache-Line-Fetch-in/m-p/965532#M2639</link>
      <description>&lt;P&gt;Hello Adam,&lt;/P&gt;
&lt;P&gt;Currently there is no publicly available method to enable/disable the hardware prefetchers using MSRs.&lt;/P&gt;
&lt;P&gt;I'm checking whether the folks who control this info will reconsider that policy now that (at least some) BIOSes aren't providing an enable/disable prefetcher option.&lt;/P&gt;
&lt;P&gt;I don't know when I will get a reply back.&lt;/P&gt;
&lt;P&gt;In order to build the case for disclosing the settings, can you describe the reasons why you'd like to enable/disable the prefetchers?&lt;/P&gt;
&lt;P&gt;Pat&lt;/P&gt;</description>
      <pubDate>Thu, 01 Aug 2013 18:51:23 GMT</pubDate>
      <guid>https://community.intel.com/t5/Software-Tuning-Performance/Disabling-Hardware-Prefetch-and-Adjacent-Cache-Line-Fetch-in/m-p/965532#M2639</guid>
      <dc:creator>Patrick_F_Intel1</dc:creator>
      <dc:date>2013-08-01T18:51:23Z</dc:date>
    </item>
    <item>
      <title>Hi Pat,</title>
      <link>https://community.intel.com/t5/Software-Tuning-Performance/Disabling-Hardware-Prefetch-and-Adjacent-Cache-Line-Fetch-in/m-p/965533#M2640</link>
      <description>&lt;P&gt;Hi Pat,&lt;/P&gt;
&lt;P&gt;does it mean that such a access (through MSR) is possible, but is only aavailable for Bios vendors?&lt;/P&gt;</description>
      <pubDate>Fri, 02 Aug 2013 15:34:41 GMT</pubDate>
      <guid>https://community.intel.com/t5/Software-Tuning-Performance/Disabling-Hardware-Prefetch-and-Adjacent-Cache-Line-Fetch-in/m-p/965533#M2640</guid>
      <dc:creator>Bernard</dc:creator>
      <dc:date>2013-08-02T15:34:41Z</dc:date>
    </item>
    <item>
      <title>I'm a graduate student</title>
      <link>https://community.intel.com/t5/Software-Tuning-Performance/Disabling-Hardware-Prefetch-and-Adjacent-Cache-Line-Fetch-in/m-p/965534#M2641</link>
      <description>&lt;P&gt;I'm a graduate student researcher using your processors as a test bed for a paper we're trying to get published. I need the system to be as quiet as possible and I believe that the prefetcher might be introducing variability in our results.&lt;/P&gt;
&lt;P&gt;I ended up buying another motherboard that supports disabling the prefetchers, but I'd still prefer to do it from linux (and to be able to test if the prefetcher is enabled easily from linux).&lt;/P&gt;</description>
      <pubDate>Fri, 02 Aug 2013 22:08:22 GMT</pubDate>
      <guid>https://community.intel.com/t5/Software-Tuning-Performance/Disabling-Hardware-Prefetch-and-Adjacent-Cache-Line-Fetch-in/m-p/965534#M2641</guid>
      <dc:creator>Adam_J_3</dc:creator>
      <dc:date>2013-08-02T22:08:22Z</dc:date>
    </item>
    <item>
      <title>&gt;&gt;&gt;I ended up buying another</title>
      <link>https://community.intel.com/t5/Software-Tuning-Performance/Disabling-Hardware-Prefetch-and-Adjacent-Cache-Line-Fetch-in/m-p/965535#M2642</link>
      <description>&lt;P&gt;&amp;gt;&amp;gt;&amp;gt;I ended up buying another motherboard that supports disabling the prefetchers, but I'd still prefer to do it from linux (and to be able to test if the prefetcher is enabled easily from linux).&amp;gt;&amp;gt;&amp;gt;&lt;/P&gt;
&lt;P&gt;I do not think if you can do it from kernel mode.Some of the low level functionality of CPU is accessed through the Bios which may switch to SMM mode of operation.&lt;/P&gt;</description>
      <pubDate>Tue, 06 Aug 2013 09:31:17 GMT</pubDate>
      <guid>https://community.intel.com/t5/Software-Tuning-Performance/Disabling-Hardware-Prefetch-and-Adjacent-Cache-Line-Fetch-in/m-p/965535#M2642</guid>
      <dc:creator>Bernard</dc:creator>
      <dc:date>2013-08-06T09:31:17Z</dc:date>
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