topic Quote:Patrick Fay (Intel) in Software Tuning, Performance Optimization & Platform Monitoring

Does EIST_TRANS work on Sandy Bridge?

Alexander_Alexeev — Mon, 19 Aug 2013 13:40:19 GMT

Hello

I am trying to understand frequincy of transition of EIST (Enhanced Intel SpeedStep® Technology) on CPU, or rather frequency of change of CPU frequency.

I found only one event EIST_TRANS (if other available, I would be glad to know).

EIST_TRANS isn't supported in vTune, so I configured its collection via home-made cli tool and collected values. No frequincy transition was detected.

The question is, whether EIST_TRANS supported on SB or not. Are there any tricks to collect transitions?

CPU

Name Intel Xeon E5 2680
Codename Sandy Bridge-EP/EX
Specification Intel(R) Xeon(R) CPU E5-2680 0 @ 2.70GHz

Thanks,

Alexander

Hello Alexander,

Patrick_F_Intel1 — Mon, 19 Aug 2013 15:19:30 GMT

Hello Alexander,

The EIST_TRANS event isn't available on sandbridge systems, just core-2 and atom based systems.

On windows, you can use ETW (xperf/wpr/wpa) to show you frequency trasitions.

On linux, ftrace will show you frequency transitions.

Pat

Quote:Patrick Fay (Intel)

Alexander_Alexeev — Tue, 20 Aug 2013 10:31:03 GMT

Patrick Fay (Intel) wrote:

On windows, you can use ETW (xperf/wpr/wpa) to show you frequency trasitions.

Patrick, as far as I can seen xperf reports only C-state transitions (C0-C1), and for CPU frequency it always reports nominal value without any deviations although accordingly to MSR 0x198 multiplier is changing constantly.

I tried xperf version 4.8.7701 as other versions doesn't work for our environment.

Regards,

Alexander

>>...The EIST_TRANS event isn

SergeyKostrov — Fri, 23 Aug 2013 15:40:30 GMT

>>...The EIST_TRANS event isn't available on sandbridge systems, just core-2 and atom based systems. Here are two screenshots which simply demonstrate how EIST works on a system with Intel Atom N270 CPU: [ 1 ] [ 2 ]

In the 1st screenshot EIST is

SergeyKostrov — Fri, 23 Aug 2013 15:43:48 GMT

In the 1st screenshot EIST is in effect and you see 798MHz.

Hello Alexander,

Patrick_F_Intel1 — Fri, 23 Aug 2013 16:58:53 GMT

Hello Alexander,

I'm using windows 8 with xperf 6.2.9200.

If I run with:

xperf.exe -start -on CPU_CONFIG+POWER+PROC_THREAD -Buffering -Buffersize 1024 -MaxBuffers 100

do something

xperf.exe -flush -f trace.etl

xperf.exe -stop

xperf.exe -i trace.etl -tle -o trace.csv -symbols cacheonly verbose -a dumper

and

xperf.exe -i trace.etl -symbols cacheonly -a power > trace.etl.actions_power.txt

In the trace.csv file you'll see a bunch of events like:

PowerProcessorPerfState, 287951, Voltage, 1100, 800, 0x00000000, 0x0000000000000004

PowerProcessorPerfState, 287963, Voltage, 1100, 800, 0x00000000, 0x0000000000000008

which show the individual changes in frequency (timestamp, voltage, new freq, old freq, status, cpu mask)

The '-a power' report buckets the transitions. The output looks like:

P-State Summary (% of time in each frequency):

CPU, 800 MHz, 900 MHz, 1000 MHz, 1100 MHz, 1200 MHz, 1500 MHz, 1600 MHz, 1801 MHz

0, 65.26%, 2.19%, 18.10%, 0.88%, 0.87%, 0.58%, 0.87%, 11.24%

1, 65.26%, 2.19%, 18.10%, 0.88%, 0.87%, 0.58%, 0.87%, 11.24%

2, 65.26%, 2.19%, 18.10%, 0.88%, 0.87%, 0.58%, 0.87%, 11.24%

3, 65.26%, 2.19%, 18.10%, 0.88%, 0.87%, 0.58%, 0.87%, 11.24%

sigh... I wish I knew how to cut and paste stuff on this darn editor.

I'm bettting that if you computed the average non-halted frequency (with the unhalted_clockticks.thread unhalted_clockticks.ref events) over the same interval then, for say cpu 0, you'd see:

ave unhalted freq is = 800 * 0.6526 + 900 * 0.0219 + 1000 * 0.181 + 1100 * 0.0088 + 1200 * 0.0087 + 1500 * 0.0058 + 1600 * 0.0087 + 1801 * 0.1124 = ~967 MHz.

Or you could use the APERF/MPERF MSR ratio to compute the average non-halted frequency over the interval.

Pat

Patrick, How could I verify a

SergeyKostrov — Sat, 24 Aug 2013 23:22:22 GMT

Patrick, How could I verify a version of EIST used on Intel Atom N270 CPU? Thanks in advance.

Hello Sergey,

Patrick_F_Intel1 — Sun, 25 Aug 2013 01:07:12 GMT

Hello Sergey,

I only know of original speed step and Enhanced speedstep (EIST). EIST is a feature bit in CPUID input 1, output reg ecx bit 7.

Pat