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    <title>topic enabling s/w prefetching in Software Tuning, Performance Optimization &amp; Platform Monitoring</title>
    <link>https://community.intel.com/t5/Software-Tuning-Performance/enabling-s-w-prefetching/m-p/778255#M316</link>
    <description>Hi Tim,&lt;DIV&gt;&lt;/DIV&gt;&lt;DIV&gt;I tried this option, but I don't think the prefetch instruction is being generated.&lt;/DIV&gt;&lt;DIV&gt;&lt;/DIV&gt;&lt;DIV&gt;I executed below command with the option you mentioned along with "-S" option to see the assembly file.&lt;/DIV&gt;&lt;DIV&gt;--&amp;gt; icc -c -openmp -O3 -axsse4.2 -msse3  -opt-prefetch=4 -S  is.c&lt;/DIV&gt;&lt;DIV&gt;&lt;/DIV&gt;&lt;DIV&gt;But the generated assembly file is.s doesn't seem to have any prefetch instruction inserted.&lt;/DIV&gt;&lt;DIV&gt;&lt;/DIV&gt;&lt;DIV&gt;Between, I happened to read some where that '-xsse4.2' option is must to generate prefetch instruction, hence I was using it before.&lt;/DIV&gt;&lt;DIV&gt;&lt;/DIV&gt;&lt;DIV&gt;Let me know what you think about this approach.&lt;/DIV&gt;&lt;DIV&gt;&lt;/DIV&gt;&lt;DIV&gt;Regards,&lt;/DIV&gt;&lt;DIV&gt;Ram&lt;/DIV&gt;&lt;DIV&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;/DIV&gt;</description>
    <pubDate>Wed, 04 Apr 2012 03:17:02 GMT</pubDate>
    <dc:creator>ramacn</dc:creator>
    <dc:date>2012-04-04T03:17:02Z</dc:date>
    <item>
      <title>enabling s/w prefetching</title>
      <link>https://community.intel.com/t5/Software-Tuning-Performance/enabling-s-w-prefetching/m-p/778253#M314</link>
      <description>&lt;P&gt;&lt;/P&gt;&lt;DIV id="_mcePaste"&gt;Hi all,&lt;/DIV&gt;&lt;DIV id="_mcePaste"&gt;&lt;/DIV&gt;&lt;DIV id="_mcePaste"&gt;&lt;/DIV&gt;&lt;DIV id="_mcePaste"&gt;I was trying to enable software prefetching on Opteron by compiling an application using Intel compiler. But I am facing some problem.&lt;/DIV&gt;&lt;DIV id="_mcePaste"&gt;&lt;/DIV&gt;&lt;DIV id="_mcePaste"&gt;&lt;/DIV&gt;&lt;DIV id="_mcePaste"&gt;I use the below compilation command.&lt;/DIV&gt;&lt;DIV id="_mcePaste"&gt;&lt;/DIV&gt;&lt;DIV id="_mcePaste"&gt;-&amp;gt; icc -openmp -O3 -xsse4.2 -opt-prefetch=4 is.c&lt;/DIV&gt;&lt;DIV id="_mcePaste"&gt;&lt;/DIV&gt;&lt;DIV id="_mcePaste"&gt;&lt;/DIV&gt;&lt;DIV id="_mcePaste"&gt;&lt;/DIV&gt;&lt;DIV id="_mcePaste"&gt;&lt;/DIV&gt;&lt;DIV id="_mcePaste"&gt;But when I run the program I get the below error.&lt;/DIV&gt;&lt;DIV id="_mcePaste"&gt;&lt;/DIV&gt;&lt;DIV id="_mcePaste"&gt;"Fatal Error: This program was not built to run on the processor in your system.&lt;/DIV&gt;&lt;DIV id="_mcePaste"&gt;&lt;/DIV&gt;&lt;DIV id="_mcePaste"&gt;The allowed processors are: Intel processors with SSE4.2 and POPCNT instructions support."&lt;/DIV&gt;&lt;DIV id="_mcePaste"&gt;&lt;/DIV&gt;&lt;DIV id="_mcePaste"&gt;&lt;/DIV&gt;&lt;DIV id="_mcePaste"&gt;&lt;/DIV&gt;&lt;DIV id="_mcePaste"&gt;&lt;/DIV&gt;&lt;DIV id="_mcePaste"&gt;The CPU model is:&lt;/DIV&gt;&lt;DIV id="_mcePaste"&gt;&lt;/DIV&gt;&lt;DIV id="_mcePaste"&gt;model name : Quad-Core AMD Opteron Processor 2354&lt;/DIV&gt;&lt;DIV id="_mcePaste"&gt;&lt;/DIV&gt;&lt;DIV id="_mcePaste"&gt;&lt;/DIV&gt;&lt;DIV id="_mcePaste"&gt;&lt;/DIV&gt;&lt;DIV id="_mcePaste"&gt;Does anybody know what is the correct compiler option for icc to enable s/w prefetching? Please let me know.&lt;/DIV&gt;&lt;DIV id="_mcePaste"&gt;&lt;/DIV&gt;&lt;DIV id="_mcePaste"&gt;&lt;/DIV&gt;&lt;DIV id="_mcePaste"&gt;&lt;/DIV&gt;&lt;DIV id="_mcePaste"&gt;&lt;/DIV&gt;&lt;DIV id="_mcePaste"&gt;Thank you&lt;/DIV&gt;&lt;DIV id="_mcePaste"&gt;&lt;/DIV&gt;&lt;DIV id="_mcePaste"&gt;Regards,&lt;/DIV&gt;&lt;DIV id="_mcePaste"&gt;&lt;/DIV&gt;&lt;DIV id="_mcePaste"&gt;Ram&lt;/DIV&gt;&lt;P&gt;&lt;/P&gt;</description>
      <pubDate>Tue, 03 Apr 2012 23:50:10 GMT</pubDate>
      <guid>https://community.intel.com/t5/Software-Tuning-Performance/enabling-s-w-prefetching/m-p/778253#M314</guid>
      <dc:creator>ramacn</dc:creator>
      <dc:date>2012-04-03T23:50:10Z</dc:date>
    </item>
    <item>
      <title>enabling s/w prefetching</title>
      <link>https://community.intel.com/t5/Software-Tuning-Performance/enabling-s-w-prefetching/m-p/778254#M315</link>
      <description>If you want sse4.2 code and also an Opteron code path, you will need something like -axsse4.2 -msse3 . Prefetch option doesn't over-ride your architecture option.</description>
      <pubDate>Wed, 04 Apr 2012 03:01:40 GMT</pubDate>
      <guid>https://community.intel.com/t5/Software-Tuning-Performance/enabling-s-w-prefetching/m-p/778254#M315</guid>
      <dc:creator>TimP</dc:creator>
      <dc:date>2012-04-04T03:01:40Z</dc:date>
    </item>
    <item>
      <title>enabling s/w prefetching</title>
      <link>https://community.intel.com/t5/Software-Tuning-Performance/enabling-s-w-prefetching/m-p/778255#M316</link>
      <description>Hi Tim,&lt;DIV&gt;&lt;/DIV&gt;&lt;DIV&gt;I tried this option, but I don't think the prefetch instruction is being generated.&lt;/DIV&gt;&lt;DIV&gt;&lt;/DIV&gt;&lt;DIV&gt;I executed below command with the option you mentioned along with "-S" option to see the assembly file.&lt;/DIV&gt;&lt;DIV&gt;--&amp;gt; icc -c -openmp -O3 -axsse4.2 -msse3  -opt-prefetch=4 -S  is.c&lt;/DIV&gt;&lt;DIV&gt;&lt;/DIV&gt;&lt;DIV&gt;But the generated assembly file is.s doesn't seem to have any prefetch instruction inserted.&lt;/DIV&gt;&lt;DIV&gt;&lt;/DIV&gt;&lt;DIV&gt;Between, I happened to read some where that '-xsse4.2' option is must to generate prefetch instruction, hence I was using it before.&lt;/DIV&gt;&lt;DIV&gt;&lt;/DIV&gt;&lt;DIV&gt;Let me know what you think about this approach.&lt;/DIV&gt;&lt;DIV&gt;&lt;/DIV&gt;&lt;DIV&gt;Regards,&lt;/DIV&gt;&lt;DIV&gt;Ram&lt;/DIV&gt;&lt;DIV&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;/DIV&gt;</description>
      <pubDate>Wed, 04 Apr 2012 03:17:02 GMT</pubDate>
      <guid>https://community.intel.com/t5/Software-Tuning-Performance/enabling-s-w-prefetching/m-p/778255#M316</guid>
      <dc:creator>ramacn</dc:creator>
      <dc:date>2012-04-04T03:17:02Z</dc:date>
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