<?xml version="1.0" encoding="UTF-8"?>
<rss xmlns:content="http://purl.org/rss/1.0/modules/content/" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:rdf="http://www.w3.org/1999/02/22-rdf-syntax-ns#" xmlns:taxo="http://purl.org/rss/1.0/modules/taxonomy/" version="2.0">
  <channel>
    <title>topic sys_reset# use with Intel® 5 Series HM55 chipset and an embedded COM Express™ Intel® Core™ i7 Celeron processor in Software Tuning, Performance Optimization &amp; Platform Monitoring</title>
    <link>https://community.intel.com/t5/Software-Tuning-Performance/sys-reset-use-with-Intel-5-Series-HM55-chipset-and-an-embedded/m-p/1007257#M3689</link>
    <description>&lt;P style="margin-bottom: 0px; border: 0px; font-size: 12px; font-family: intel-clear, arial, helvetica, 'helvetica neue', verdana, sans-serif; vertical-align: baseline; color: rgb(61, 61, 61); line-height: 15px;"&gt;Hello.&lt;/P&gt;

&lt;P style="margin-bottom: 0px; border: 0px; font-size: 12px; font-family: intel-clear, arial, helvetica, 'helvetica neue', verdana, sans-serif; vertical-align: baseline; color: rgb(61, 61, 61); line-height: 15px; min-height: 8pt;"&gt;&amp;nbsp;&lt;/P&gt;

&lt;P style="margin-bottom: 0px; border: 0px; font-size: 12px; font-family: intel-clear, arial, helvetica, 'helvetica neue', verdana, sans-serif; vertical-align: baseline; color: rgb(61, 61, 61); line-height: 15px;"&gt;We are using an embedded COM Express™&amp;nbsp;&lt;SPAN style="margin: 0px; padding: 0px; border: 0px; font-weight: inherit; font-style: inherit; font-size: 10pt; vertical-align: baseline; line-height: 1.5em;"&gt;Intel® Core™ i7 Celeron processor&amp;nbsp; with an Intel® 5 Series HM55 chipset by Congatec, model&amp;nbsp;&lt;/SPAN&gt;conga-BM57.&lt;/P&gt;

&lt;P style="margin-bottom: 0px; border: 0px; font-size: 12px; font-family: intel-clear, arial, helvetica, 'helvetica neue', verdana, sans-serif; vertical-align: baseline; color: rgb(61, 61, 61); line-height: 15px; min-height: 8pt;"&gt;&amp;nbsp;&lt;/P&gt;

&lt;P style="margin-bottom: 0px; border: 0px; font-size: 12px; font-family: intel-clear, arial, helvetica, 'helvetica neue', verdana, sans-serif; vertical-align: baseline; color: rgb(61, 61, 61); line-height: 15px;"&gt;We have on our carrier also an Altera™ Startix IV FPGA.&lt;/P&gt;

&lt;P style="margin-bottom: 0px; border: 0px; font-size: 12px; font-family: intel-clear, arial, helvetica, 'helvetica neue', verdana, sans-serif; vertical-align: baseline; color: rgb(61, 61, 61); line-height: 15px; min-height: 8pt;"&gt;&amp;nbsp;&lt;/P&gt;

&lt;P style="margin-bottom: 0px; border: 0px; font-size: 12px; font-family: intel-clear, arial, helvetica, 'helvetica neue', verdana, sans-serif; vertical-align: baseline; color: rgb(61, 61, 61); line-height: 15px;"&gt;We have (in this Hardware design) one ATX Power supply with no ability to turn it on selectively (ON=all voltages are ON).&lt;/P&gt;

&lt;P style="margin-bottom: 0px; border: 0px; font-size: 12px; font-family: intel-clear, arial, helvetica, 'helvetica neue', verdana, sans-serif; vertical-align: baseline; color: rgb(61, 61, 61); line-height: 15px; min-height: 8pt;"&gt;&amp;nbsp;&lt;/P&gt;

&lt;P style="margin-bottom: 0px; border: 0px; font-size: 12px; font-family: intel-clear, arial, helvetica, 'helvetica neue', verdana, sans-serif; vertical-align: baseline; color: rgb(61, 61, 61); line-height: 15px;"&gt;We are facing a PCIe "no communication" problem (We can see it only when the Windows OS finishes to start up) one of 7-10 "power-on" cycles to the system&lt;/P&gt;

&lt;P style="margin-bottom: 0px; border: 0px; font-size: 12px; font-family: intel-clear, arial, helvetica, 'helvetica neue', verdana, sans-serif; vertical-align: baseline; color: rgb(61, 61, 61); line-height: 15px; min-height: 8pt;"&gt;&amp;nbsp;&lt;/P&gt;

&lt;P style="margin-bottom: 0px; border: 0px; font-size: 12px; font-family: intel-clear, arial, helvetica, 'helvetica neue', verdana, sans-serif; vertical-align: baseline; color: rgb(61, 61, 61); line-height: 15px;"&gt;We saw that if we wait three seconds - till the FPGA reports "I'm ready" - before setting the "PWR_OK" signal, the BIOS sometimes doesn't start.&lt;/P&gt;

&lt;P style="margin-bottom: 0px; border: 0px; font-size: 12px; font-family: intel-clear, arial, helvetica, 'helvetica neue', verdana, sans-serif; vertical-align: baseline; color: rgb(61, 61, 61); line-height: 15px;"&gt;On the other hand, if we set no delay before the PWR_OK except waiting (100-500msec) that the Power Supply reports "Power_Good", we get the PCIe no-comm situation most of the times - but the BIOS always starts.&lt;/P&gt;

&lt;P style="margin-bottom: 0px; border: 0px; font-size: 12px; font-family: intel-clear, arial, helvetica, 'helvetica neue', verdana, sans-serif; vertical-align: baseline; color: rgb(61, 61, 61); line-height: 15px; min-height: 8pt;"&gt;&amp;nbsp;&lt;/P&gt;

&lt;P style="margin-bottom: 0px; border: 0px; font-size: 12px; font-family: intel-clear, arial, helvetica, 'helvetica neue', verdana, sans-serif; vertical-align: baseline; color: rgb(61, 61, 61); line-height: 15px;"&gt;We tried to:&lt;/P&gt;

&lt;P style="margin-bottom: 0px; border: 0px; font-size: 12px; font-family: intel-clear, arial, helvetica, 'helvetica neue', verdana, sans-serif; vertical-align: baseline; color: rgb(61, 61, 61); line-height: 15px;"&gt;1. Add a 1.5-2sec delay before setting the "PWR_OK", letting the FPGA "some more time" to get ready.&lt;/P&gt;

&lt;P style="margin-bottom: 0px; border: 0px; font-size: 12px; font-family: intel-clear, arial, helvetica, 'helvetica neue', verdana, sans-serif; vertical-align: baseline; color: rgb(61, 61, 61); line-height: 15px;"&gt;2. Adding a "SYS_RESET#" use by setting the signal '1'&amp;gt;'0'&amp;gt;'1' for 50msec. First we set it when the FPGA reports "I'm ready" (It happens approx. 3sec from the Power_Supply "PSON#" set).&lt;/P&gt;

&lt;P style="margin-bottom: 0px; border: 0px; font-size: 12px; font-family: intel-clear, arial, helvetica, 'helvetica neue', verdana, sans-serif; vertical-align: baseline; color: rgb(61, 61, 61); line-height: 15px;"&gt;Later we set it&amp;nbsp;&lt;SPAN style="margin: 0px; padding: 0px; border: 0px; font-weight: inherit; font-style: inherit; vertical-align: baseline; text-decoration: underline;"&gt;1 sec after&lt;/SPAN&gt;&amp;nbsp;he FPGA reports "I'm ready".&lt;/P&gt;

&lt;P style="margin-bottom: 0px; border: 0px; font-size: 12px; font-family: intel-clear, arial, helvetica, 'helvetica neue', verdana, sans-serif; vertical-align: baseline; color: rgb(61, 61, 61); line-height: 15px; min-height: 8pt;"&gt;&amp;nbsp;&lt;/P&gt;

&lt;P style="margin-bottom: 0px; border: 0px; font-size: 12px; font-family: intel-clear, arial, helvetica, 'helvetica neue', verdana, sans-serif; vertical-align: baseline; color: rgb(61, 61, 61); line-height: 15px;"&gt;These to changes brought us to approx. 1 "PCIe no-comm situation" for 50 start-ups of the system.&lt;/P&gt;

&lt;P style="margin-bottom: 0px; border: 0px; font-size: 12px; font-family: intel-clear, arial, helvetica, 'helvetica neue', verdana, sans-serif; vertical-align: baseline; color: rgb(61, 61, 61); line-height: 15px;"&gt;Another important thing is, if we "restart" Windows (The Power Supply and the system stay ON), it starts up with everything OK - The PCIe works stable. We did also "stress" tests to the PCIe comm successfully.&lt;/P&gt;

&lt;P style="margin-bottom: 0px; border: 0px; font-size: 12px; font-family: intel-clear, arial, helvetica, 'helvetica neue', verdana, sans-serif; vertical-align: baseline; color: rgb(61, 61, 61); line-height: 15px; min-height: 8pt;"&gt;&amp;nbsp;&lt;/P&gt;

&lt;P style="margin-bottom: 0px; border: 0px; font-size: 12px; font-family: intel-clear, arial, helvetica, 'helvetica neue', verdana, sans-serif; vertical-align: baseline; color: rgb(61, 61, 61); line-height: 15px;"&gt;In order to bring the system to 100% successful start-ups and no problems with PCIe. May I ask for any guidelines&amp;nbsp; for the Power-Up Sequence and/or using the PWR_OK and the SYS_RESET#?&lt;/P&gt;

&lt;P style="margin-bottom: 0px; border: 0px; font-size: 12px; font-family: intel-clear, arial, helvetica, 'helvetica neue', verdana, sans-serif; vertical-align: baseline; color: rgb(61, 61, 61); line-height: 15px;"&gt;What is the typical timing for the SYS_RESET#? What is the maximum period of time that a delay before PWR_OK can be set safely?&lt;/P&gt;

&lt;P style="margin-bottom: 0px; border: 0px; font-size: 12px; font-family: intel-clear, arial, helvetica, 'helvetica neue', verdana, sans-serif; vertical-align: baseline; color: rgb(61, 61, 61); line-height: 15px; min-height: 8pt;"&gt;&amp;nbsp;&lt;/P&gt;

&lt;P style="margin-bottom: 0px; border: 0px; font-size: 12px; font-family: intel-clear, arial, helvetica, 'helvetica neue', verdana, sans-serif; vertical-align: baseline; color: rgb(61, 61, 61); line-height: 15px; min-height: 8pt;"&gt;&amp;nbsp;&lt;/P&gt;

&lt;P style="margin-bottom: 0px; border: 0px; font-size: 12px; font-family: intel-clear, arial, helvetica, 'helvetica neue', verdana, sans-serif; vertical-align: baseline; color: rgb(61, 61, 61); line-height: 15px;"&gt;Thank you very much in advance,&lt;/P&gt;

&lt;P style="margin-bottom: 0px; border: 0px; font-size: 12px; font-family: intel-clear, arial, helvetica, 'helvetica neue', verdana, sans-serif; vertical-align: baseline; color: rgb(61, 61, 61); line-height: 15px; min-height: 8pt;"&gt;&amp;nbsp;&lt;/P&gt;

&lt;P style="margin-bottom: 0px; border: 0px; font-size: 12px; font-family: intel-clear, arial, helvetica, 'helvetica neue', verdana, sans-serif; vertical-align: baseline; color: rgb(61, 61, 61); line-height: 15px;"&gt;Lior Mor.&lt;/P&gt;

&lt;P style="margin-bottom: 0px; border: 0px; font-size: 12px; font-family: intel-clear, arial, helvetica, 'helvetica neue', verdana, sans-serif; vertical-align: baseline; color: rgb(61, 61, 61); line-height: 15px;"&gt;&lt;A class="jive-link-external-small" href="http://www.intel.com/content/dam/www/public/us/en/documents/datasheets/5-chipset-3400-chipset-datasheet.pdf" rel="nofollow" style="padding-right: calc(12px + 0.35ex); border: 0px; font-weight: inherit; font-style: inherit; vertical-align: baseline; color: rgb(0, 113, 197);" target="_blank"&gt;http://www.intel.com/content/dam/www/public/us/en/documents/datasheets/5-chipset-3400-chipset-datasheet.pdf&lt;/A&gt;&lt;/P&gt;

&lt;P style="margin-bottom: 0px; border: 0px; font-size: 12px; font-family: intel-clear, arial, helvetica, 'helvetica neue', verdana, sans-serif; vertical-align: baseline; color: rgb(61, 61, 61); line-height: 15px; min-height: 8pt;"&gt;&amp;nbsp;&lt;/P&gt;

&lt;P style="margin-bottom: 0px; border: 0px; font-size: 12px; font-family: intel-clear, arial, helvetica, 'helvetica neue', verdana, sans-serif; vertical-align: baseline; color: rgb(61, 61, 61); line-height: 15px;"&gt;&lt;A class="jive-link-external-small" href="http://www.congatec.com/fileadmin/user_upload/Documents/Manual/BM57_BS57_BE57m12.pdf" rel="nofollow" style="padding-right: calc(12px + 0.35ex); border: 0px; font-weight: inherit; font-style: inherit; vertical-align: baseline; color: rgb(0, 113, 197);" target="_blank"&gt;http://www.congatec.com/fileadmin/user_upload/Documents/Manual/BM57_BS57_BE57m12.pdf&lt;/A&gt;&lt;/P&gt;</description>
    <pubDate>Sun, 28 Sep 2014 09:26:59 GMT</pubDate>
    <dc:creator>Lior_M_</dc:creator>
    <dc:date>2014-09-28T09:26:59Z</dc:date>
    <item>
      <title>sys_reset# use with Intel® 5 Series HM55 chipset and an embedded COM Express™ Intel® Core™ i7 Celeron processor</title>
      <link>https://community.intel.com/t5/Software-Tuning-Performance/sys-reset-use-with-Intel-5-Series-HM55-chipset-and-an-embedded/m-p/1007257#M3689</link>
      <description>&lt;P style="margin-bottom: 0px; border: 0px; font-size: 12px; font-family: intel-clear, arial, helvetica, 'helvetica neue', verdana, sans-serif; vertical-align: baseline; color: rgb(61, 61, 61); line-height: 15px;"&gt;Hello.&lt;/P&gt;

&lt;P style="margin-bottom: 0px; border: 0px; font-size: 12px; font-family: intel-clear, arial, helvetica, 'helvetica neue', verdana, sans-serif; vertical-align: baseline; color: rgb(61, 61, 61); line-height: 15px; min-height: 8pt;"&gt;&amp;nbsp;&lt;/P&gt;

&lt;P style="margin-bottom: 0px; border: 0px; font-size: 12px; font-family: intel-clear, arial, helvetica, 'helvetica neue', verdana, sans-serif; vertical-align: baseline; color: rgb(61, 61, 61); line-height: 15px;"&gt;We are using an embedded COM Express™&amp;nbsp;&lt;SPAN style="margin: 0px; padding: 0px; border: 0px; font-weight: inherit; font-style: inherit; font-size: 10pt; vertical-align: baseline; line-height: 1.5em;"&gt;Intel® Core™ i7 Celeron processor&amp;nbsp; with an Intel® 5 Series HM55 chipset by Congatec, model&amp;nbsp;&lt;/SPAN&gt;conga-BM57.&lt;/P&gt;

&lt;P style="margin-bottom: 0px; border: 0px; font-size: 12px; font-family: intel-clear, arial, helvetica, 'helvetica neue', verdana, sans-serif; vertical-align: baseline; color: rgb(61, 61, 61); line-height: 15px; min-height: 8pt;"&gt;&amp;nbsp;&lt;/P&gt;

&lt;P style="margin-bottom: 0px; border: 0px; font-size: 12px; font-family: intel-clear, arial, helvetica, 'helvetica neue', verdana, sans-serif; vertical-align: baseline; color: rgb(61, 61, 61); line-height: 15px;"&gt;We have on our carrier also an Altera™ Startix IV FPGA.&lt;/P&gt;

&lt;P style="margin-bottom: 0px; border: 0px; font-size: 12px; font-family: intel-clear, arial, helvetica, 'helvetica neue', verdana, sans-serif; vertical-align: baseline; color: rgb(61, 61, 61); line-height: 15px; min-height: 8pt;"&gt;&amp;nbsp;&lt;/P&gt;

&lt;P style="margin-bottom: 0px; border: 0px; font-size: 12px; font-family: intel-clear, arial, helvetica, 'helvetica neue', verdana, sans-serif; vertical-align: baseline; color: rgb(61, 61, 61); line-height: 15px;"&gt;We have (in this Hardware design) one ATX Power supply with no ability to turn it on selectively (ON=all voltages are ON).&lt;/P&gt;

&lt;P style="margin-bottom: 0px; border: 0px; font-size: 12px; font-family: intel-clear, arial, helvetica, 'helvetica neue', verdana, sans-serif; vertical-align: baseline; color: rgb(61, 61, 61); line-height: 15px; min-height: 8pt;"&gt;&amp;nbsp;&lt;/P&gt;

&lt;P style="margin-bottom: 0px; border: 0px; font-size: 12px; font-family: intel-clear, arial, helvetica, 'helvetica neue', verdana, sans-serif; vertical-align: baseline; color: rgb(61, 61, 61); line-height: 15px;"&gt;We are facing a PCIe "no communication" problem (We can see it only when the Windows OS finishes to start up) one of 7-10 "power-on" cycles to the system&lt;/P&gt;

&lt;P style="margin-bottom: 0px; border: 0px; font-size: 12px; font-family: intel-clear, arial, helvetica, 'helvetica neue', verdana, sans-serif; vertical-align: baseline; color: rgb(61, 61, 61); line-height: 15px; min-height: 8pt;"&gt;&amp;nbsp;&lt;/P&gt;

&lt;P style="margin-bottom: 0px; border: 0px; font-size: 12px; font-family: intel-clear, arial, helvetica, 'helvetica neue', verdana, sans-serif; vertical-align: baseline; color: rgb(61, 61, 61); line-height: 15px;"&gt;We saw that if we wait three seconds - till the FPGA reports "I'm ready" - before setting the "PWR_OK" signal, the BIOS sometimes doesn't start.&lt;/P&gt;

&lt;P style="margin-bottom: 0px; border: 0px; font-size: 12px; font-family: intel-clear, arial, helvetica, 'helvetica neue', verdana, sans-serif; vertical-align: baseline; color: rgb(61, 61, 61); line-height: 15px;"&gt;On the other hand, if we set no delay before the PWR_OK except waiting (100-500msec) that the Power Supply reports "Power_Good", we get the PCIe no-comm situation most of the times - but the BIOS always starts.&lt;/P&gt;

&lt;P style="margin-bottom: 0px; border: 0px; font-size: 12px; font-family: intel-clear, arial, helvetica, 'helvetica neue', verdana, sans-serif; vertical-align: baseline; color: rgb(61, 61, 61); line-height: 15px; min-height: 8pt;"&gt;&amp;nbsp;&lt;/P&gt;

&lt;P style="margin-bottom: 0px; border: 0px; font-size: 12px; font-family: intel-clear, arial, helvetica, 'helvetica neue', verdana, sans-serif; vertical-align: baseline; color: rgb(61, 61, 61); line-height: 15px;"&gt;We tried to:&lt;/P&gt;

&lt;P style="margin-bottom: 0px; border: 0px; font-size: 12px; font-family: intel-clear, arial, helvetica, 'helvetica neue', verdana, sans-serif; vertical-align: baseline; color: rgb(61, 61, 61); line-height: 15px;"&gt;1. Add a 1.5-2sec delay before setting the "PWR_OK", letting the FPGA "some more time" to get ready.&lt;/P&gt;

&lt;P style="margin-bottom: 0px; border: 0px; font-size: 12px; font-family: intel-clear, arial, helvetica, 'helvetica neue', verdana, sans-serif; vertical-align: baseline; color: rgb(61, 61, 61); line-height: 15px;"&gt;2. Adding a "SYS_RESET#" use by setting the signal '1'&amp;gt;'0'&amp;gt;'1' for 50msec. First we set it when the FPGA reports "I'm ready" (It happens approx. 3sec from the Power_Supply "PSON#" set).&lt;/P&gt;

&lt;P style="margin-bottom: 0px; border: 0px; font-size: 12px; font-family: intel-clear, arial, helvetica, 'helvetica neue', verdana, sans-serif; vertical-align: baseline; color: rgb(61, 61, 61); line-height: 15px;"&gt;Later we set it&amp;nbsp;&lt;SPAN style="margin: 0px; padding: 0px; border: 0px; font-weight: inherit; font-style: inherit; vertical-align: baseline; text-decoration: underline;"&gt;1 sec after&lt;/SPAN&gt;&amp;nbsp;he FPGA reports "I'm ready".&lt;/P&gt;

&lt;P style="margin-bottom: 0px; border: 0px; font-size: 12px; font-family: intel-clear, arial, helvetica, 'helvetica neue', verdana, sans-serif; vertical-align: baseline; color: rgb(61, 61, 61); line-height: 15px; min-height: 8pt;"&gt;&amp;nbsp;&lt;/P&gt;

&lt;P style="margin-bottom: 0px; border: 0px; font-size: 12px; font-family: intel-clear, arial, helvetica, 'helvetica neue', verdana, sans-serif; vertical-align: baseline; color: rgb(61, 61, 61); line-height: 15px;"&gt;These to changes brought us to approx. 1 "PCIe no-comm situation" for 50 start-ups of the system.&lt;/P&gt;

&lt;P style="margin-bottom: 0px; border: 0px; font-size: 12px; font-family: intel-clear, arial, helvetica, 'helvetica neue', verdana, sans-serif; vertical-align: baseline; color: rgb(61, 61, 61); line-height: 15px;"&gt;Another important thing is, if we "restart" Windows (The Power Supply and the system stay ON), it starts up with everything OK - The PCIe works stable. We did also "stress" tests to the PCIe comm successfully.&lt;/P&gt;

&lt;P style="margin-bottom: 0px; border: 0px; font-size: 12px; font-family: intel-clear, arial, helvetica, 'helvetica neue', verdana, sans-serif; vertical-align: baseline; color: rgb(61, 61, 61); line-height: 15px; min-height: 8pt;"&gt;&amp;nbsp;&lt;/P&gt;

&lt;P style="margin-bottom: 0px; border: 0px; font-size: 12px; font-family: intel-clear, arial, helvetica, 'helvetica neue', verdana, sans-serif; vertical-align: baseline; color: rgb(61, 61, 61); line-height: 15px;"&gt;In order to bring the system to 100% successful start-ups and no problems with PCIe. May I ask for any guidelines&amp;nbsp; for the Power-Up Sequence and/or using the PWR_OK and the SYS_RESET#?&lt;/P&gt;

&lt;P style="margin-bottom: 0px; border: 0px; font-size: 12px; font-family: intel-clear, arial, helvetica, 'helvetica neue', verdana, sans-serif; vertical-align: baseline; color: rgb(61, 61, 61); line-height: 15px;"&gt;What is the typical timing for the SYS_RESET#? What is the maximum period of time that a delay before PWR_OK can be set safely?&lt;/P&gt;

&lt;P style="margin-bottom: 0px; border: 0px; font-size: 12px; font-family: intel-clear, arial, helvetica, 'helvetica neue', verdana, sans-serif; vertical-align: baseline; color: rgb(61, 61, 61); line-height: 15px; min-height: 8pt;"&gt;&amp;nbsp;&lt;/P&gt;

&lt;P style="margin-bottom: 0px; border: 0px; font-size: 12px; font-family: intel-clear, arial, helvetica, 'helvetica neue', verdana, sans-serif; vertical-align: baseline; color: rgb(61, 61, 61); line-height: 15px; min-height: 8pt;"&gt;&amp;nbsp;&lt;/P&gt;

&lt;P style="margin-bottom: 0px; border: 0px; font-size: 12px; font-family: intel-clear, arial, helvetica, 'helvetica neue', verdana, sans-serif; vertical-align: baseline; color: rgb(61, 61, 61); line-height: 15px;"&gt;Thank you very much in advance,&lt;/P&gt;

&lt;P style="margin-bottom: 0px; border: 0px; font-size: 12px; font-family: intel-clear, arial, helvetica, 'helvetica neue', verdana, sans-serif; vertical-align: baseline; color: rgb(61, 61, 61); line-height: 15px; min-height: 8pt;"&gt;&amp;nbsp;&lt;/P&gt;

&lt;P style="margin-bottom: 0px; border: 0px; font-size: 12px; font-family: intel-clear, arial, helvetica, 'helvetica neue', verdana, sans-serif; vertical-align: baseline; color: rgb(61, 61, 61); line-height: 15px;"&gt;Lior Mor.&lt;/P&gt;

&lt;P style="margin-bottom: 0px; border: 0px; font-size: 12px; font-family: intel-clear, arial, helvetica, 'helvetica neue', verdana, sans-serif; vertical-align: baseline; color: rgb(61, 61, 61); line-height: 15px;"&gt;&lt;A class="jive-link-external-small" href="http://www.intel.com/content/dam/www/public/us/en/documents/datasheets/5-chipset-3400-chipset-datasheet.pdf" rel="nofollow" style="padding-right: calc(12px + 0.35ex); border: 0px; font-weight: inherit; font-style: inherit; vertical-align: baseline; color: rgb(0, 113, 197);" target="_blank"&gt;http://www.intel.com/content/dam/www/public/us/en/documents/datasheets/5-chipset-3400-chipset-datasheet.pdf&lt;/A&gt;&lt;/P&gt;

&lt;P style="margin-bottom: 0px; border: 0px; font-size: 12px; font-family: intel-clear, arial, helvetica, 'helvetica neue', verdana, sans-serif; vertical-align: baseline; color: rgb(61, 61, 61); line-height: 15px; min-height: 8pt;"&gt;&amp;nbsp;&lt;/P&gt;

&lt;P style="margin-bottom: 0px; border: 0px; font-size: 12px; font-family: intel-clear, arial, helvetica, 'helvetica neue', verdana, sans-serif; vertical-align: baseline; color: rgb(61, 61, 61); line-height: 15px;"&gt;&lt;A class="jive-link-external-small" href="http://www.congatec.com/fileadmin/user_upload/Documents/Manual/BM57_BS57_BE57m12.pdf" rel="nofollow" style="padding-right: calc(12px + 0.35ex); border: 0px; font-weight: inherit; font-style: inherit; vertical-align: baseline; color: rgb(0, 113, 197);" target="_blank"&gt;http://www.congatec.com/fileadmin/user_upload/Documents/Manual/BM57_BS57_BE57m12.pdf&lt;/A&gt;&lt;/P&gt;</description>
      <pubDate>Sun, 28 Sep 2014 09:26:59 GMT</pubDate>
      <guid>https://community.intel.com/t5/Software-Tuning-Performance/sys-reset-use-with-Intel-5-Series-HM55-chipset-and-an-embedded/m-p/1007257#M3689</guid>
      <dc:creator>Lior_M_</dc:creator>
      <dc:date>2014-09-28T09:26:59Z</dc:date>
    </item>
  </channel>
</rss>

