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    <title>topic I can't point to a positive in Software Tuning, Performance Optimization &amp; Platform Monitoring</title>
    <link>https://community.intel.com/t5/Software-Tuning-Performance/CPU-supports-clwb-and-clflushopt/m-p/1094007#M5707</link>
    <description>&lt;P&gt;I can't point to a positive result, but I see negative results on Xeon E5 v1 (Sandy Bridge EP), Xeon E5 v2 (Ivy Bridge EP), Xeon E5 v3 (Haswell EP), Xeon E5 v4 (Broadwell EP), Atom C2xxx, Xeon Phi (Knights Corner), and Xeon Phi x200 (Knights Landing).&lt;/P&gt;

&lt;P&gt;I don't have any Skylake client platforms to test -- that seems like the most likely place for these instructions to first show up....&lt;/P&gt;</description>
    <pubDate>Mon, 13 Feb 2017 17:23:29 GMT</pubDate>
    <dc:creator>McCalpinJohn</dc:creator>
    <dc:date>2017-02-13T17:23:29Z</dc:date>
    <item>
      <title>CPU supports clwb and clflushopt</title>
      <link>https://community.intel.com/t5/Software-Tuning-Performance/CPU-supports-clwb-and-clflushopt/m-p/1094006#M5706</link>
      <description>&lt;P&gt;&lt;SPAN style="color: rgb(36, 39, 41); font-family: Arial, &amp;quot;Helvetica Neue&amp;quot;, Helvetica, sans-serif; font-size: 15px;"&gt;Hi all, I'm trying to find an Intel CPU which supports clwb and clflushopt. Can anyone give me some information about it? Thanks.&lt;/SPAN&gt;&lt;/P&gt;</description>
      <pubDate>Mon, 13 Feb 2017 08:45:42 GMT</pubDate>
      <guid>https://community.intel.com/t5/Software-Tuning-Performance/CPU-supports-clwb-and-clflushopt/m-p/1094006#M5706</guid>
      <dc:creator>kai_w_</dc:creator>
      <dc:date>2017-02-13T08:45:42Z</dc:date>
    </item>
    <item>
      <title>I can't point to a positive</title>
      <link>https://community.intel.com/t5/Software-Tuning-Performance/CPU-supports-clwb-and-clflushopt/m-p/1094007#M5707</link>
      <description>&lt;P&gt;I can't point to a positive result, but I see negative results on Xeon E5 v1 (Sandy Bridge EP), Xeon E5 v2 (Ivy Bridge EP), Xeon E5 v3 (Haswell EP), Xeon E5 v4 (Broadwell EP), Atom C2xxx, Xeon Phi (Knights Corner), and Xeon Phi x200 (Knights Landing).&lt;/P&gt;

&lt;P&gt;I don't have any Skylake client platforms to test -- that seems like the most likely place for these instructions to first show up....&lt;/P&gt;</description>
      <pubDate>Mon, 13 Feb 2017 17:23:29 GMT</pubDate>
      <guid>https://community.intel.com/t5/Software-Tuning-Performance/CPU-supports-clwb-and-clflushopt/m-p/1094007#M5707</guid>
      <dc:creator>McCalpinJohn</dc:creator>
      <dc:date>2017-02-13T17:23:29Z</dc:date>
    </item>
    <item>
      <title>CLFlushOpt and CLWB is meant</title>
      <link>https://community.intel.com/t5/Software-Tuning-Performance/CPU-supports-clwb-and-clflushopt/m-p/1094008#M5708</link>
      <description>&lt;P&gt;CLFlushOpt and CLWB is meant for use with non-volatile memory. &amp;nbsp;I would expect it to come out with products that support the new Optane technology. &amp;nbsp;http://www.intel.com/content/www/us/en/architecture-and-technology/intel-optane-technology.html&lt;/P&gt;</description>
      <pubDate>Sat, 11 Mar 2017 05:59:47 GMT</pubDate>
      <guid>https://community.intel.com/t5/Software-Tuning-Performance/CPU-supports-clwb-and-clflushopt/m-p/1094008#M5708</guid>
      <dc:creator>Adrian_C_</dc:creator>
      <dc:date>2017-03-11T05:59:47Z</dc:date>
    </item>
    <item>
      <title>Just for clarification: The</title>
      <link>https://community.intel.com/t5/Software-Tuning-Performance/CPU-supports-clwb-and-clflushopt/m-p/1094009#M5709</link>
      <description>&lt;P&gt;Just for clarification: The Optane drives that&lt;A href="http://www.intel.com/content/www/us/en/solid-state-drives/optane-ssd-dc-p4800x-brief.html"&gt; launched earlier this week&lt;/A&gt; are implementing block I/O (over NVMe). There is the option to use&lt;A href="http://www.intel.com/content/www/us/en/solid-state-drives/optane-ssd-dc-p4800x-mdt-brief.html"&gt; Intel Memory Drive Technology,&lt;/A&gt; which adds a software layer to expose the drives memory as system memory. CLFLUSHOPT won't be needed for that.&lt;/P&gt;

&lt;P&gt;On the other hand, CLFLUSHOPT could be useful for other use-cases than non-volatile memory. In fact, CLFLUSHOPT comes close to the original description of CLFLUSH. However, the&lt;A href="http://www.intel.com/content/dam/www/public/us/en/documents/manuals/64-ia-32-architectures-software-developer-instruction-set-reference-manual-325383.pdf"&gt; instruction set reference manual&lt;/A&gt; has now been updated with the information that CLFLUSH is not only ordered in respect to MFENCE but with writes and locked read-modify-write instructions as well. (This has always been the case but was not documented in the past.)&lt;/P&gt;

&lt;P&gt;My Intel Core i7-7500U seems to support CLFLUSHOPT but not CLWB. Unfortunately, &lt;A href="http://ark.intel.com/products/95451/Intel-Core-i7-7500U-Processor-4M-Cache-up-to-3_50-GHz-"&gt;ark.intel.com&lt;/A&gt; does not list this feature flag, so I'm relying on HWINFO64.&lt;/P&gt;</description>
      <pubDate>Fri, 24 Mar 2017 13:17:52 GMT</pubDate>
      <guid>https://community.intel.com/t5/Software-Tuning-Performance/CPU-supports-clwb-and-clflushopt/m-p/1094009#M5709</guid>
      <dc:creator>Thomas_W_Intel</dc:creator>
      <dc:date>2017-03-24T13:17:52Z</dc:date>
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