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    <title>topic Are you able to read the in Software Tuning, Performance Optimization &amp; Platform Monitoring</title>
    <link>https://community.intel.com/t5/Software-Tuning-Performance/RAPL-Per-Core-Power-Measurement-Capping/m-p/1094842#M5717</link>
    <description>&lt;P&gt;Kevin - Are you able to read the sysfs files, in the first place? I suspect there might be a BIOS/Kernel lock.&lt;/P&gt;</description>
    <pubDate>Wed, 25 Jan 2017 03:46:00 GMT</pubDate>
    <dc:creator>Srujan_S_</dc:creator>
    <dc:date>2017-01-25T03:46:00Z</dc:date>
    <item>
      <title>RAPL - Per Core Power Measurement / Capping</title>
      <link>https://community.intel.com/t5/Software-Tuning-Performance/RAPL-Per-Core-Power-Measurement-Capping/m-p/1094840#M5715</link>
      <description>&lt;P&gt;Hi,&lt;/P&gt;

&lt;P&gt;I'm trying to use RAPL to measure and powercap &lt;STRONG&gt;individual&lt;/STRONG&gt; cores.&lt;BR /&gt;
	However, it seems that my experiments only achieve measurement / capping of &lt;STRONG&gt;all cores&lt;/STRONG&gt;.&lt;/P&gt;

&lt;P&gt;I have tried two ways to control the power on a per-core basis. My first attempt was to use the sysfs interface at "/sys/class/powercap/intel-rapl". Unfortunately, it only distinguishes between core&lt;SPAN style="font-size: 13.008px; line-height: 19.512px;"&gt;&amp;nbsp;("&lt;/SPAN&gt;&lt;SPAN style="font-size: 13.008px; line-height: 19.512px;"&gt;intel-rapl:0:0")&lt;/SPAN&gt;, uncore &lt;SPAN style="font-size: 13.008px; line-height: 19.512px;"&gt;("&lt;/SPAN&gt;&lt;SPAN style="font-size: 13.008px; line-height: 19.512px;"&gt;intel-rapl:0:1") and&lt;/SPAN&gt;&amp;nbsp;dram ("intel-rapl:0:2") for each package and does not subdivide into separate cores.&lt;BR /&gt;
	My second attempt was then to manually write a proper value into the MSR of each core ("/dev/cpu/$core/msr"), but this doesn't seem to work either.&lt;/P&gt;

&lt;P&gt;I'm working with an&amp;nbsp;Intel Xeon CPU E3-1275 v5 (Skylake, Family 6, Model 94).&lt;BR /&gt;
	Is there any way to measure and / or powercap individual cores with RAPL?&lt;/P&gt;

&lt;P&gt;Thank you!&lt;/P&gt;</description>
      <pubDate>Mon, 13 Jun 2016 15:43:31 GMT</pubDate>
      <guid>https://community.intel.com/t5/Software-Tuning-Performance/RAPL-Per-Core-Power-Measurement-Capping/m-p/1094840#M5715</guid>
      <dc:creator>Dave_W_2</dc:creator>
      <dc:date>2016-06-13T15:43:31Z</dc:date>
    </item>
    <item>
      <title>Hi Dave,</title>
      <link>https://community.intel.com/t5/Software-Tuning-Performance/RAPL-Per-Core-Power-Measurement-Capping/m-p/1094841#M5716</link>
      <description>&lt;P&gt;&lt;SPAN style="font-size: 1em;"&gt;Hi Dave,&lt;/SPAN&gt;&lt;/P&gt;

&lt;P&gt;When I followed your first approach and tried to cap the power by edit &lt;SPAN style="font-variant-ligatures: no-common-ligatures"&gt;/sys/devices/virtual/powercap/intel-rapl/intel-rapl:0/constraint_0_power_limit_uw, the error message showed up:&lt;/SPAN&gt;&amp;nbsp;&lt;SPAN style="font-variant-ligatures: no-common-ligatures"&gt;"constraint_1_power_limit_uw" E667: Fsync failed" even by using the root privilege. Do you have any ideas how to capping for all cores?&lt;/SPAN&gt;&lt;/P&gt;

&lt;P&gt;&lt;SPAN style="font-variant-ligatures: no-common-ligatures"&gt;Thanks,&lt;/SPAN&gt;&lt;/P&gt;

&lt;P&gt;&lt;SPAN style="font-variant-ligatures: no-common-ligatures"&gt;Kevin&lt;/SPAN&gt;&lt;/P&gt;</description>
      <pubDate>Tue, 10 Jan 2017 04:06:32 GMT</pubDate>
      <guid>https://community.intel.com/t5/Software-Tuning-Performance/RAPL-Per-Core-Power-Measurement-Capping/m-p/1094841#M5716</guid>
      <dc:creator>Kevin</dc:creator>
      <dc:date>2017-01-10T04:06:32Z</dc:date>
    </item>
    <item>
      <title>Are you able to read the</title>
      <link>https://community.intel.com/t5/Software-Tuning-Performance/RAPL-Per-Core-Power-Measurement-Capping/m-p/1094842#M5717</link>
      <description>&lt;P&gt;Kevin - Are you able to read the sysfs files, in the first place? I suspect there might be a BIOS/Kernel lock.&lt;/P&gt;</description>
      <pubDate>Wed, 25 Jan 2017 03:46:00 GMT</pubDate>
      <guid>https://community.intel.com/t5/Software-Tuning-Performance/RAPL-Per-Core-Power-Measurement-Capping/m-p/1094842#M5717</guid>
      <dc:creator>Srujan_S_</dc:creator>
      <dc:date>2017-01-25T03:46:00Z</dc:date>
    </item>
    <item>
      <title>Hello Srujan S, can you guide</title>
      <link>https://community.intel.com/t5/Software-Tuning-Performance/RAPL-Per-Core-Power-Measurement-Capping/m-p/1094843#M5718</link>
      <description>&lt;P&gt;Hello Srujan S, can you guide me how to unlock the RAPL limits? In my system, the BIOS has locked the RAPL package and DRAM limits. I can change the PP0 and PP1 limits but not Pkg and DRAM. I am using a Haswell m/c with Ubuntu 14.04 OS. Any help will be highly appreciated. than you.&lt;/P&gt;</description>
      <pubDate>Wed, 25 Jan 2017 10:57:33 GMT</pubDate>
      <guid>https://community.intel.com/t5/Software-Tuning-Performance/RAPL-Per-Core-Power-Measurement-Capping/m-p/1094843#M5718</guid>
      <dc:creator>APand8</dc:creator>
      <dc:date>2017-01-25T10:57:33Z</dc:date>
    </item>
    <item>
      <title>Quote:Anmol Panda wrote:</title>
      <link>https://community.intel.com/t5/Software-Tuning-Performance/RAPL-Per-Core-Power-Measurement-Capping/m-p/1094844#M5719</link>
      <description>&lt;P&gt;&lt;/P&gt;&lt;BLOCKQUOTE&gt;Anmol Panda wrote:&lt;BR /&gt;&lt;P&gt;&lt;/P&gt;

&lt;P&gt;Hello Srujan S, can you guide me how to unlock the RAPL limits? In my system, the BIOS has locked the RAPL package and DRAM limits. I can change the PP0 and PP1 limits but not Pkg and DRAM. I am using a Haswell m/c with Ubuntu 14.04 OS. Any help will be highly appreciated. than you.&lt;/P&gt;

&lt;P&gt;&lt;/P&gt;&lt;/BLOCKQUOTE&gt;&lt;P&gt;&lt;/P&gt;

&lt;P&gt;I had a similar problem with one of the machines. If the 63-bit of the RAPL_PKG_POWER_LIMIT has been set at boot by the BIOS, you cannot change it thereafter. I was told the only solution is to update to a BIOS version that has the 63-bit disabled.&lt;/P&gt;

&lt;P&gt;Hope this helps.&lt;/P&gt;</description>
      <pubDate>Fri, 03 Feb 2017 05:45:01 GMT</pubDate>
      <guid>https://community.intel.com/t5/Software-Tuning-Performance/RAPL-Per-Core-Power-Measurement-Capping/m-p/1094844#M5719</guid>
      <dc:creator>sbhal1</dc:creator>
      <dc:date>2017-02-03T05:45:01Z</dc:date>
    </item>
    <item>
      <title>Quote:Anmol Panda wrote:</title>
      <link>https://community.intel.com/t5/Software-Tuning-Performance/RAPL-Per-Core-Power-Measurement-Capping/m-p/1094845#M5720</link>
      <description>&lt;P&gt;&lt;/P&gt;&lt;BLOCKQUOTE&gt;Anmol Panda wrote:&lt;BR /&gt;&lt;P&gt;&lt;/P&gt;

&lt;P&gt;Hello Srujan S, can you guide me how to unlock the RAPL limits? In my system, the BIOS has locked the RAPL package and DRAM limits. I can change the PP0 and PP1 limits but not Pkg and DRAM. I am using a Haswell m/c with Ubuntu 14.04 OS. Any help will be highly appreciated. than you.&lt;/P&gt;

&lt;P&gt;&lt;/P&gt;&lt;/BLOCKQUOTE&gt;&lt;P&gt;&lt;/P&gt;

&lt;P&gt;I had a similar problem with one of the machines. If the 63-bit of the RAPL_PKG_POWER_LIMIT has been set at boot by the BIOS, you cannot change it thereafter. I was told the only solution is to update to a BIOS version that has the 63-bit disabled.&lt;/P&gt;

&lt;P&gt;Hope this helps.&lt;/P&gt;</description>
      <pubDate>Fri, 03 Feb 2017 05:45:41 GMT</pubDate>
      <guid>https://community.intel.com/t5/Software-Tuning-Performance/RAPL-Per-Core-Power-Measurement-Capping/m-p/1094845#M5720</guid>
      <dc:creator>sbhal1</dc:creator>
      <dc:date>2017-02-03T05:45:41Z</dc:date>
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