<?xml version="1.0" encoding="UTF-8"?>
<rss xmlns:content="http://purl.org/rss/1.0/modules/content/" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:rdf="http://www.w3.org/1999/02/22-rdf-syntax-ns#" xmlns:taxo="http://purl.org/rss/1.0/modules/taxonomy/" version="2.0">
  <channel>
    <title>topic I assume that this is a &amp;quot;Core in Software Tuning, Performance Optimization &amp; Platform Monitoring</title>
    <link>https://community.intel.com/t5/Software-Tuning-Performance/Performance-Counters-of-Memory-Write-Traffic/m-p/1114246#M6080</link>
    <description>&lt;P&gt;I assume that this is a "Core i?" processor?&lt;/P&gt;

&lt;P&gt;There are DRAM access counters on these processors.&amp;nbsp; They are not particularly easy to use, but Intel has provided some degree of documentation at &lt;A href="https://software.intel.com/en-us/articles/monitoring-integrated-memory-controller-requests-in-the-2nd-3rd-and-4th-generation-intel" target="_blank"&gt;https://software.intel.com/en-us/articles/monitoring-integrated-memory-controller-requests-in-the-2nd-3rd-and-4th-generation-intel&lt;/A&gt;&lt;/P&gt;

&lt;P&gt;Using this documentation I had no trouble building tools (for a Linux system) to read these counters on Xeon E3-12xx processor (Sandy Bridge with the "client" uncore), but I don't know what interfaces Windows provides for accessing PCI memory-mapped address ranges....&lt;/P&gt;</description>
    <pubDate>Mon, 29 Aug 2016 18:32:22 GMT</pubDate>
    <dc:creator>McCalpinJohn</dc:creator>
    <dc:date>2016-08-29T18:32:22Z</dc:date>
    <item>
      <title>Performance Counters of Memory Write Traffic</title>
      <link>https://community.intel.com/t5/Software-Tuning-Performance/Performance-Counters-of-Memory-Write-Traffic/m-p/1114245#M6079</link>
      <description>&lt;DIV&gt;I have four 5M-pixel cameras simultaneously and continuously transfer image data to system memory via PCIe (Gen2) x4 (Q77 chipset is already skipped). According to performance counter of the PCIe switch, expected data rate (~240MB/s) cannot be maintained&amp;nbsp;when&amp;nbsp;the processor (CPU)&amp;nbsp;calls&amp;nbsp;some compute intensive functions. Therefore, I would like to use performance counters (LLC or IMC)&amp;nbsp;of the processor (Intel 3770K) to figure out the root cause of dropped data rate (e.g. &amp;lt; 120MB/s).&lt;/DIV&gt;

&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;

&lt;DIV&gt;When I run 'pcm.exe' of Intel PCM (version 2.11), the 'READ' counter, the 'WRITE' counter and the 'IO'&amp;nbsp;counter give me zero values. It seems to me that IMC counters are supported by high-end processor only, right?&lt;/DIV&gt;

&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;

&lt;DIV&gt;Which performance counters should I consider first for the above goal of finding root cause of dropped data rate?&lt;/DIV&gt;</description>
      <pubDate>Sun, 28 Aug 2016 11:40:41 GMT</pubDate>
      <guid>https://community.intel.com/t5/Software-Tuning-Performance/Performance-Counters-of-Memory-Write-Traffic/m-p/1114245#M6079</guid>
      <dc:creator>JWong19</dc:creator>
      <dc:date>2016-08-28T11:40:41Z</dc:date>
    </item>
    <item>
      <title>I assume that this is a "Core</title>
      <link>https://community.intel.com/t5/Software-Tuning-Performance/Performance-Counters-of-Memory-Write-Traffic/m-p/1114246#M6080</link>
      <description>&lt;P&gt;I assume that this is a "Core i?" processor?&lt;/P&gt;

&lt;P&gt;There are DRAM access counters on these processors.&amp;nbsp; They are not particularly easy to use, but Intel has provided some degree of documentation at &lt;A href="https://software.intel.com/en-us/articles/monitoring-integrated-memory-controller-requests-in-the-2nd-3rd-and-4th-generation-intel" target="_blank"&gt;https://software.intel.com/en-us/articles/monitoring-integrated-memory-controller-requests-in-the-2nd-3rd-and-4th-generation-intel&lt;/A&gt;&lt;/P&gt;

&lt;P&gt;Using this documentation I had no trouble building tools (for a Linux system) to read these counters on Xeon E3-12xx processor (Sandy Bridge with the "client" uncore), but I don't know what interfaces Windows provides for accessing PCI memory-mapped address ranges....&lt;/P&gt;</description>
      <pubDate>Mon, 29 Aug 2016 18:32:22 GMT</pubDate>
      <guid>https://community.intel.com/t5/Software-Tuning-Performance/Performance-Counters-of-Memory-Write-Traffic/m-p/1114246#M6080</guid>
      <dc:creator>McCalpinJohn</dc:creator>
      <dc:date>2016-08-29T18:32:22Z</dc:date>
    </item>
  </channel>
</rss>

