topic TLB miss in Software Tuning, Performance Optimization & Platform Monitoring

TLB miss

Yukyoung_L_ — Tue, 11 Sep 2018 06:08:31 GMT

Hello.

I am working on IvyTown processor, and want to measure the number of dTLB misses.

I have three questions.

1. Can I measure the number of L1 dTLB misses by the sum of DTLB_LOAD_MISSES.STLB_HIT, DTLB_STORE_MISSES.STLB_HIT, DTLB_LOAD_MISSES.MISS_CUASES_A_WALK, and DTLB_STORE_MISSES.MISS_CAUSES_A_WALK?

2. Does it also contain the TLB miss of huge pages?

3. Does LLC miss count contain DTLB miss? (I measured the number of LLC misses by OFFCORE_RESPONSES.ALL_READS.LLC_MISS.ANY_RESPONSE_0)

Thank you.

Hi,

Dmitry_R_Intel1 — Mon, 17 Sep 2018 08:47:13 GMT

Hi,

1. Yes the event set looks correct. Note that IVT also has DTLB_LOAD_MISSES.WALK_DURATION and DTLB_STORE_MISSES.WALK_DURATION events - they will be more useful if you want to estimate performance impact rather than raw count of misses.

2. Yes according to events documentation all page sizes should be covered by these events

3. No I think the situation when you have DTLB miss but LLC (or L2 or even L1) hit for actual data is quite possible.