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    <title>topic What is an unknown data source? in Software Tuning, Performance Optimization &amp; Platform Monitoring</title>
    <link>https://community.intel.com/t5/Software-Tuning-Performance/What-is-an-unknown-data-source/m-p/1131170#M6407</link>
    <description>&lt;P&gt;The Intel manual mentions that some of the performance events exclude "unknown data source." These include the following events on Broadwell:&lt;/P&gt;&lt;P&gt;MEM_LOAD_UOPS_RETIRED.L1_MISS, MEM_LOAD_UOPS_RETIRED.L2_MISS, and MEM_LOAD_UOPS_RETIRED.L3_MISS.&lt;/P&gt;&lt;P&gt;and the following events on Haswell:&lt;/P&gt;&lt;P&gt;MEM_LOAD_UOPS_RETIRED.L2_MISS and MEM_LOAD_UOPS_RETIRED.L3_MISS.&lt;/P&gt;&lt;P&gt;and the MEM_LOAD_UOPS_RETIRED.L2_MISS event on Ivy Bridge.&lt;/P&gt;&lt;P&gt;There are apparently no "unknown data sources" on Skylake.&lt;/P&gt;&lt;P&gt;(1) What is an unknown data source?&lt;/P&gt;&lt;P&gt;(2) When and why unknown data sources occur?&lt;/P&gt;&lt;P&gt;(3) Does MEM_UOPS_RETIRED.ALL_LOADS count unknown data sources?&lt;/P&gt;&lt;P&gt;(4) Are there really no unknown data sources on Skylake or are they counted by the events?&lt;/P&gt;&lt;P&gt;(5) Why does MEM_LOAD_UOPS_RETIRED.L1_MISS include unknown data sources on Ivy Bridge and Haswell but not on Broadwell? Why does MEM_LOAD_UOPS_RETIRED.LLC_MISS include unknown data sources on Ivy Bridge but not on Haswell and Broadwell?&lt;/P&gt;&lt;P&gt;(6) The online documentation (https://download.01.org/perfmon/index/) also says that some of the cache hit events also exclude unknown data source on some of these microarchitectures. What does that mean? How can a cache hit have an unknown data source?&lt;/P&gt;&lt;P&gt;I find all of this very confusing.&lt;/P&gt;</description>
    <pubDate>Fri, 19 Apr 2019 19:22:33 GMT</pubDate>
    <dc:creator>HadiBrais</dc:creator>
    <dc:date>2019-04-19T19:22:33Z</dc:date>
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      <title>What is an unknown data source?</title>
      <link>https://community.intel.com/t5/Software-Tuning-Performance/What-is-an-unknown-data-source/m-p/1131170#M6407</link>
      <description>&lt;P&gt;The Intel manual mentions that some of the performance events exclude "unknown data source." These include the following events on Broadwell:&lt;/P&gt;&lt;P&gt;MEM_LOAD_UOPS_RETIRED.L1_MISS, MEM_LOAD_UOPS_RETIRED.L2_MISS, and MEM_LOAD_UOPS_RETIRED.L3_MISS.&lt;/P&gt;&lt;P&gt;and the following events on Haswell:&lt;/P&gt;&lt;P&gt;MEM_LOAD_UOPS_RETIRED.L2_MISS and MEM_LOAD_UOPS_RETIRED.L3_MISS.&lt;/P&gt;&lt;P&gt;and the MEM_LOAD_UOPS_RETIRED.L2_MISS event on Ivy Bridge.&lt;/P&gt;&lt;P&gt;There are apparently no "unknown data sources" on Skylake.&lt;/P&gt;&lt;P&gt;(1) What is an unknown data source?&lt;/P&gt;&lt;P&gt;(2) When and why unknown data sources occur?&lt;/P&gt;&lt;P&gt;(3) Does MEM_UOPS_RETIRED.ALL_LOADS count unknown data sources?&lt;/P&gt;&lt;P&gt;(4) Are there really no unknown data sources on Skylake or are they counted by the events?&lt;/P&gt;&lt;P&gt;(5) Why does MEM_LOAD_UOPS_RETIRED.L1_MISS include unknown data sources on Ivy Bridge and Haswell but not on Broadwell? Why does MEM_LOAD_UOPS_RETIRED.LLC_MISS include unknown data sources on Ivy Bridge but not on Haswell and Broadwell?&lt;/P&gt;&lt;P&gt;(6) The online documentation (https://download.01.org/perfmon/index/) also says that some of the cache hit events also exclude unknown data source on some of these microarchitectures. What does that mean? How can a cache hit have an unknown data source?&lt;/P&gt;&lt;P&gt;I find all of this very confusing.&lt;/P&gt;</description>
      <pubDate>Fri, 19 Apr 2019 19:22:33 GMT</pubDate>
      <guid>https://community.intel.com/t5/Software-Tuning-Performance/What-is-an-unknown-data-source/m-p/1131170#M6407</guid>
      <dc:creator>HadiBrais</dc:creator>
      <dc:date>2019-04-19T19:22:33Z</dc:date>
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