https://community.intel.com/t5/Software-Tuning-Performance/What-happens-in-DSB-LSD-when-an-instruction-is-invalidated-using/m-p/1144784#M6736 <P>I have a small loop that fit the rules required to use LSD mechanism. The most relevant rule, in this case, is that all the micro-ops are resident in DSB. From the Optimization Manual, it is known that LSD fetches instructions from DSB while it works. It known that LSD ends when a misprediction takes place: "The loop streams from the micro-op queue, with no more fetching, decoding, or reading micro-ops from any of the caches, until a branch misprediction inevitably ends it."</P> <P>It is also known that DSB is a sort of "L0 cache": it is virtually included in L1 Icache. The Optimization Manual says:"Instruction cache evictions must also be evicted from the Decoded ICache, which evicts only the necessary lines".</P> <P>The question is the following:</P> <P>What happens when i run the described loop in a process and i evict one of its intruction from all the caches using CLFLUSH from another process? It's not clear if the micro-ops associated to the instruction are evicted from the DSB and, so the LSD should stop.</P> <P>My idea is that the eviction of micro-ops in DSB does not take place and the DSB continues to work.</P> Sat, 21 Oct 2017 08:56:26 GMT Matteo_Fusi 2017-10-21T08:56:26Z https://community.intel.com/t5/Software-Tuning-Performance/What-happens-in-DSB-LSD-when-an-instruction-is-invalidated-using/m-p/1144784#M6736 <P>I have a small loop that fit the rules required to use LSD mechanism. The most relevant rule, in this case, is that all the micro-ops are resident in DSB. From the Optimization Manual, it is known that LSD fetches instructions from DSB while it works. It known that LSD ends when a misprediction takes place: "The loop streams from the micro-op queue, with no more fetching, decoding, or reading micro-ops from any of the caches, until a branch misprediction inevitably ends it."</P> <P>It is also known that DSB is a sort of "L0 cache": it is virtually included in L1 Icache. The Optimization Manual says:"Instruction cache evictions must also be evicted from the Decoded ICache, which evicts only the necessary lines".</P> <P>The question is the following:</P> <P>What happens when i run the described loop in a process and i evict one of its intruction from all the caches using CLFLUSH from another process? It's not clear if the micro-ops associated to the instruction are evicted from the DSB and, so the LSD should stop.</P> <P>My idea is that the eviction of micro-ops in DSB does not take place and the DSB continues to work.</P> Sat, 21 Oct 2017 08:56:26 GMT https://community.intel.com/t5/Software-Tuning-Performance/What-happens-in-DSB-LSD-when-an-instruction-is-invalidated-using/m-p/1144784#M6736 Matteo_Fusi 2017-10-21T08:56:26Z