<?xml version="1.0" encoding="UTF-8"?>
<rss xmlns:content="http://purl.org/rss/1.0/modules/content/" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:rdf="http://www.w3.org/1999/02/22-rdf-syntax-ns#" xmlns:taxo="http://purl.org/rss/1.0/modules/taxonomy/" version="2.0">
  <channel>
    <title>Software Tuning, Performance Optimization &amp; Platform Monitoring의 주제 PEBS for KVM guest</title>
    <link>https://community.intel.com/t5/Software-Tuning-Performance/PEBS-for-KVM-guest/m-p/1150626#M6817</link>
    <description>&lt;P&gt;I was looking into the perf code to enable PEBS sampling for KVM guest. While registering perf_event_attr, I have set exclude_guest = 0 and exclude_host = 1. With this setting I am not receiving any PEBS samples.&lt;/P&gt;

&lt;P&gt;After digging into the kernel code, I have found that, in &lt;STRONG&gt;&lt;EM&gt;add_atomic_switch_msr&lt;/EM&gt;&lt;/STRONG&gt; function, &lt;STRONG&gt;MSR_IA32_PEBS_ENABLE&lt;/STRONG&gt; is being set to 0.&lt;/P&gt;

&lt;P&gt;It also states that, "PEBS needs a quiescent period after being disabled (to write a record).&amp;nbsp; Disabling PEBS through VMX MSR swapping doesn't provide that period, so a CPU could write host's record into guest's memory."&lt;/P&gt;

&lt;P&gt;Is it possible to enable the PEBS for guest while keeping the host PEBS disabled?&lt;/P&gt;

&lt;P&gt;&amp;nbsp;&lt;/P&gt;

&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
    <pubDate>Tue, 03 Jul 2018 16:18:42 GMT</pubDate>
    <dc:creator>proy4</dc:creator>
    <dc:date>2018-07-03T16:18:42Z</dc:date>
    <item>
      <title>PEBS for KVM guest</title>
      <link>https://community.intel.com/t5/Software-Tuning-Performance/PEBS-for-KVM-guest/m-p/1150626#M6817</link>
      <description>&lt;P&gt;I was looking into the perf code to enable PEBS sampling for KVM guest. While registering perf_event_attr, I have set exclude_guest = 0 and exclude_host = 1. With this setting I am not receiving any PEBS samples.&lt;/P&gt;

&lt;P&gt;After digging into the kernel code, I have found that, in &lt;STRONG&gt;&lt;EM&gt;add_atomic_switch_msr&lt;/EM&gt;&lt;/STRONG&gt; function, &lt;STRONG&gt;MSR_IA32_PEBS_ENABLE&lt;/STRONG&gt; is being set to 0.&lt;/P&gt;

&lt;P&gt;It also states that, "PEBS needs a quiescent period after being disabled (to write a record).&amp;nbsp; Disabling PEBS through VMX MSR swapping doesn't provide that period, so a CPU could write host's record into guest's memory."&lt;/P&gt;

&lt;P&gt;Is it possible to enable the PEBS for guest while keeping the host PEBS disabled?&lt;/P&gt;

&lt;P&gt;&amp;nbsp;&lt;/P&gt;

&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Tue, 03 Jul 2018 16:18:42 GMT</pubDate>
      <guid>https://community.intel.com/t5/Software-Tuning-Performance/PEBS-for-KVM-guest/m-p/1150626#M6817</guid>
      <dc:creator>proy4</dc:creator>
      <dc:date>2018-07-03T16:18:42Z</dc:date>
    </item>
  </channel>
</rss>

