https://community.intel.com/t5/Software-Tuning-Performance/AES-NI-performance-optimization/m-p/1182067#M7473 <P>&nbsp;</P> <P>Hi,</P> <P>I am using iaesx64.s from Intel's sample library for disk encryption. It encrypts/decrypts 4 blocks at a time for increased performance.</P> <P>I was wondering if I change the code such that it encrypts 8 blocks at a time , will that result in any performance improvement? Or will that result in too much register pressure? Are there any guidelines available to change the assembly code?</P> <P>Looking forward to some advice</P> <P>Many Thanks</P> <P>Rani</P> Thu, 11 Jan 2018 10:38:43 GMT r__rani 2018-01-11T10:38:43Z https://community.intel.com/t5/Software-Tuning-Performance/AES-NI-performance-optimization/m-p/1182067#M7473 <P>&nbsp;</P> <P>Hi,</P> <P>I am using iaesx64.s from Intel's sample library for disk encryption. It encrypts/decrypts 4 blocks at a time for increased performance.</P> <P>I was wondering if I change the code such that it encrypts 8 blocks at a time , will that result in any performance improvement? Or will that result in too much register pressure? Are there any guidelines available to change the assembly code?</P> <P>Looking forward to some advice</P> <P>Many Thanks</P> <P>Rani</P> Thu, 11 Jan 2018 10:38:43 GMT https://community.intel.com/t5/Software-Tuning-Performance/AES-NI-performance-optimization/m-p/1182067#M7473 r__rani 2018-01-11T10:38:43Z