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    <title>topic Re: How to detect microarchitecture on Xeon Scalable? in Software Tuning, Performance Optimization &amp; Platform Monitoring</title>
    <link>https://community.intel.com/t5/Software-Tuning-Performance/How-to-detect-microarchitecture-on-Xeon-Scalable/m-p/1206692#M7641</link>
    <description>&lt;P&gt;Thank your for your help, it really helps me a lot.&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;And I wonder where could I found the stepping ID table? What I mean is a list of stepping IDs and microarchitecture.&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;Thanks&lt;/P&gt;</description>
    <pubDate>Fri, 04 Sep 2020 08:06:00 GMT</pubDate>
    <dc:creator>templex</dc:creator>
    <dc:date>2020-09-04T08:06:00Z</dc:date>
    <item>
      <title>How to detect microarchitecture on Xeon Scalable?</title>
      <link>https://community.intel.com/t5/Software-Tuning-Performance/How-to-detect-microarchitecture-on-Xeon-Scalable/m-p/1205162#M7633</link>
      <description>&lt;P&gt;Some Xeon CPUs share the same family and model code but has different microarchitecture.&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;What I want is to detect the microarchitecture by instruction like CPUID or something else.&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;I found Xeon&amp;nbsp;&lt;SPAN class="s5"&gt;S&lt;/SPAN&gt;&lt;SPAN class="s5"&gt;c&lt;/SPAN&gt;&lt;SPAN class="s5"&gt;a&lt;/SPAN&gt;&lt;SPAN class="s5"&gt;l&lt;/SPAN&gt;&lt;SPAN class="s5"&gt;a&lt;/SPAN&gt;&lt;SPAN class="s5"&gt;b&lt;/SPAN&gt;&lt;SPAN class="s5"&gt;l&lt;/SPAN&gt;&lt;SPAN class="s6"&gt;e&lt;/SPAN&gt;&amp;nbsp;'s crystal frequency's behavior is different on different microarchitectures:&lt;/P&gt;
&lt;P&gt;1. On Skylake,&amp;nbsp;&lt;SPAN&gt;its actual frequency by (approximately) -0.25%&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt;2. On&amp;nbsp;Cascade Lake, the frequency is stable (&lt;SPAN class="s5"&gt;2&lt;/SPAN&gt;&lt;SPAN class="s6"&gt;5&lt;/SPAN&gt; &lt;SPAN class="s5"&gt;M&lt;/SPAN&gt;&lt;SPAN class="s5"&gt;H&lt;/SPAN&gt;&lt;SPAN class="s6"&gt;z) (I'm not really sure about that, see question: &lt;A href="https://community.intel.com/t5/Software-Tuning-Performance/About-crystal-frequency-slow-down-in-Xeon-non-skylake/m-p/1204217#M7626" target="_self"&gt;here&lt;/A&gt;)&lt;/SPAN&gt;&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt;&lt;SPAN class="s6"&gt;So I want to get the microarchitecture on Xeon.&lt;/SPAN&gt;&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt;&lt;SPAN class="s6"&gt;Thank you!&lt;/SPAN&gt;&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Sat, 29 Aug 2020 04:59:16 GMT</pubDate>
      <guid>https://community.intel.com/t5/Software-Tuning-Performance/How-to-detect-microarchitecture-on-Xeon-Scalable/m-p/1205162#M7633</guid>
      <dc:creator>templex</dc:creator>
      <dc:date>2020-08-29T04:59:16Z</dc:date>
    </item>
    <item>
      <title>Re: How to detect microarchitecture on Xeon Scalable?</title>
      <link>https://community.intel.com/t5/Software-Tuning-Performance/How-to-detect-microarchitecture-on-Xeon-Scalable/m-p/1205279#M7634</link>
      <description>&lt;P&gt;The stepping ID (which is the lowest 4 bits of CPUID.(EAX=0x1, ECX=0x0):EAX) for CSL-SP is 0x7 while the stepping IDs for SKL-SP are 0x2, 0x3, and 0x4.&lt;/P&gt;</description>
      <pubDate>Sun, 30 Aug 2020 03:19:30 GMT</pubDate>
      <guid>https://community.intel.com/t5/Software-Tuning-Performance/How-to-detect-microarchitecture-on-Xeon-Scalable/m-p/1205279#M7634</guid>
      <dc:creator>HadiBrais</dc:creator>
      <dc:date>2020-08-30T03:19:30Z</dc:date>
    </item>
    <item>
      <title>Re: How to detect microarchitecture on Xeon Scalable?</title>
      <link>https://community.intel.com/t5/Software-Tuning-Performance/How-to-detect-microarchitecture-on-Xeon-Scalable/m-p/1206692#M7641</link>
      <description>&lt;P&gt;Thank your for your help, it really helps me a lot.&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;And I wonder where could I found the stepping ID table? What I mean is a list of stepping IDs and microarchitecture.&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;Thanks&lt;/P&gt;</description>
      <pubDate>Fri, 04 Sep 2020 08:06:00 GMT</pubDate>
      <guid>https://community.intel.com/t5/Software-Tuning-Performance/How-to-detect-microarchitecture-on-Xeon-Scalable/m-p/1206692#M7641</guid>
      <dc:creator>templex</dc:creator>
      <dc:date>2020-09-04T08:06:00Z</dc:date>
    </item>
    <item>
      <title>Re: How to detect microarchitecture on Xeon Scalable?</title>
      <link>https://community.intel.com/t5/Software-Tuning-Performance/How-to-detect-microarchitecture-on-Xeon-Scalable/m-p/1206882#M7643</link>
      <description>&lt;P&gt;This information can be found in the specification update documents of the processors that implement a given microarchitecture. For example, for SKL-SP, the specification update document can be found at: &lt;A href="https://www.intel.com/content/dam/www/public/us/en/documents/specification-updates/xeon-scalable-spec-update.pdf" target="_self"&gt;https://www.intel.com/content/dam/www/public/us/en/documents/specification-updates/xeon-scalable-spec-update.pdf&lt;/A&gt;. There can be multiple specification update documents for different collections of processors that implement the same microarchitecture.&lt;/P&gt;
&lt;P&gt;The specification update documents usually only list the CPUID information for boxed processors, not tray processors, so they don't really provide a complete of stepping IDs. For example, stepping ID 0x3 mentioned in my earlier post is for tray SKL-SP processors. There can be other stepping IDs that I'm not aware of. If you care about both boxed and tray processors, you can contact Intel for a complete list of CPUID information.&lt;/P&gt;</description>
      <pubDate>Fri, 04 Sep 2020 20:00:38 GMT</pubDate>
      <guid>https://community.intel.com/t5/Software-Tuning-Performance/How-to-detect-microarchitecture-on-Xeon-Scalable/m-p/1206882#M7643</guid>
      <dc:creator>HadiBrais</dc:creator>
      <dc:date>2020-09-04T20:00:38Z</dc:date>
    </item>
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