https://community.intel.com/t5/Software-Tuning-Performance/What-stands-for-VTD-ACCESS-event/m-p/1256337#M7802 <P>Hi,</P> <P>I'm looking for details of VTD_ACCESS.L4_PAGE_HIT events described in Uncore Performance Monitoring Reference Manual.&nbsp;I am testing PCIe performance of two same Cascade Lake systems using VT-d legacy mode and I found there are some differences of VTD_ACCESS related events(especially VTD_ACCESS.L4_PAGE_HIT) behavior between them.&nbsp;I checked that document but nothing is described on it.</P> <P>What stands for VTD_ACCESS.L4_PAGE_HIT? I presume "L4_PAGE_HIT" means cache hit of PML4 entry. Is it correct?</P> <P><BR />Thank you for reading this contribution.</P> Tue, 16 Feb 2021 09:37:41 GMT n-okada8442 2021-02-16T09:37:41Z https://community.intel.com/t5/Software-Tuning-Performance/What-stands-for-VTD-ACCESS-event/m-p/1256337#M7802 <P>Hi,</P> <P>I'm looking for details of VTD_ACCESS.L4_PAGE_HIT events described in Uncore Performance Monitoring Reference Manual.&nbsp;I am testing PCIe performance of two same Cascade Lake systems using VT-d legacy mode and I found there are some differences of VTD_ACCESS related events(especially VTD_ACCESS.L4_PAGE_HIT) behavior between them.&nbsp;I checked that document but nothing is described on it.</P> <P>What stands for VTD_ACCESS.L4_PAGE_HIT? I presume "L4_PAGE_HIT" means cache hit of PML4 entry. Is it correct?</P> <P><BR />Thank you for reading this contribution.</P> Tue, 16 Feb 2021 09:37:41 GMT https://community.intel.com/t5/Software-Tuning-Performance/What-stands-for-VTD-ACCESS-event/m-p/1256337#M7802 n-okada8442 2021-02-16T09:37:41Z