Performance Counter for DRAM Per-Rank Memory Access

TheAhmad — Fri, 12 Mar 2021 01:00:14 GMT

I have an `Intel(R) Core(TM) i7-4720HQ CPU @ 2.60GHz` (`Haswell`) processor. I need to retrieve the number of accesses to each DRAM rank, over time, to estimate its power consumption. Based on page `261` of the chipset documentation (i.e., Datasheet, volume 2 (M- and H-processor lines) ), I could use the 32-bit value in register, `RAM—DRAM_ENERGY_STATUS`, as a DRAM energy estimation. But I need rank-level energy estimates. I could also use core and offcore DRAM access performance counters to estimate power consumption, but, as mentioned before, I need per-rank statistics. Besides that, they report whole-system stats, while energy is calculated per-rank. They also do not report many DRAM accesses.

Therefore, `IMC` counters should be the ideal choice. `Perf` does not support these counters. I tried to use PCM-Memory to access `IMC` counter information. But `/sys/bus/event_source/devices/uncore_imc` is not mounted by the kernel (the version is `5.0.0-37-generic`) and the tool does not detect the CPU. I tried to access uncore performance counters, manually. Whole-system DRAM access counters are documented, here (They were not documented in the above-mentioned chipset manual). I can retrieve total DRAM read and write accesses using these counters. But, there is no information about channel or rank-level access information. How can I find the offset associated with these counters? Should I use trial and error?

Re: Performance Counter for DRAM Per-Rank Memory Access

TheAhmad — Sat, 13 Mar 2021 11:26:18 GMT

This question is also asked at Stackoverflow .

topic Performance Counter for DRAM Per-Rank Memory Access in Software Tuning, Performance Optimization & Platform Monitoring

Performance Counter for DRAM Per-Rank Memory Access

Re: Performance Counter for DRAM Per-Rank Memory Access