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    <title>topic Cannot configure RAPL on Atom C2558 (Rangeley) in Software Tuning, Performance Optimization &amp; Platform Monitoring</title>
    <link>https://community.intel.com/t5/Software-Tuning-Performance/Cannot-configure-RAPL-on-Atom-C2558-Rangeley/m-p/1300615#M7918</link>
    <description>&lt;P&gt;I'm using an older Intel Atom C2558 CPU (formerly "Rangeley").&amp;nbsp; For some reason the Linux kernel does not expose RAPL access to the C2000 series of CPUs through the powercap interface (intel_rapl/intel_rapl_msr module).&amp;nbsp; However, the Intel Software Developer's Manual, Vol. 4 claims RAPL support for this CPU model (0x4D) - see Table 2-10 in the June 2021 SDM release.&amp;nbsp; So I am using direct MSR access instead.&lt;/P&gt;
&lt;P&gt;This CPU model has a unique RAPL MSR configuration.&amp;nbsp; Its power and energy units in MSR_RAPL_POWER_UNIT are like some other older Atom CPUs, but unlike other Silvermont CPUs, its time units and the MSR_PKG_POWER_LIMIT appear to use the traditional encodings, per Section 14.10.3 (June 2021 SDM).&lt;/P&gt;
&lt;P&gt;I am able to read the package power limits from the MSR, and the values appear reasonable after conversion.&amp;nbsp; However, when I try to write a new power limit, the write appears to be ignored and the old values remain.&amp;nbsp; I confirmed that the lock bit is not set.&amp;nbsp; For example, reading register 0x610 gives a value of 0x004688CA005B8753, but rejects my write after modifying bits 0-14 with new value&amp;nbsp;0x004688CA005B84E2 (to try and set PL1, though setting PL2 also fails).&lt;/P&gt;
&lt;P&gt;The same problem applies to the PP0 (core) domain, whose MSR exists but is not documented in the SDM.&lt;/P&gt;
&lt;P&gt;RAPL documentation for these C2000 CPUs is sparse, and the lack of Linux powercap support also raises questions about their RAPL capabilities.&amp;nbsp; Can anyone answer any of the following:&lt;/P&gt;
&lt;OL&gt;
&lt;LI&gt;If they've ever tried writing RAPL configurations for any C2000 series CPU (model 0x4D), and whether they were successful (or not).&lt;/LI&gt;
&lt;LI&gt;Why writing to the RAPL power limit registers are being ignored.&lt;/LI&gt;
&lt;LI&gt;Why there is no powercap support in the Linux kernel for this CPU model.&lt;/LI&gt;
&lt;/OL&gt;
&lt;P&gt;Thanks!&lt;BR /&gt;-Connor&lt;/P&gt;</description>
    <pubDate>Thu, 22 Jul 2021 15:14:40 GMT</pubDate>
    <dc:creator>connorimes</dc:creator>
    <dc:date>2021-07-22T15:14:40Z</dc:date>
    <item>
      <title>Cannot configure RAPL on Atom C2558 (Rangeley)</title>
      <link>https://community.intel.com/t5/Software-Tuning-Performance/Cannot-configure-RAPL-on-Atom-C2558-Rangeley/m-p/1300615#M7918</link>
      <description>&lt;P&gt;I'm using an older Intel Atom C2558 CPU (formerly "Rangeley").&amp;nbsp; For some reason the Linux kernel does not expose RAPL access to the C2000 series of CPUs through the powercap interface (intel_rapl/intel_rapl_msr module).&amp;nbsp; However, the Intel Software Developer's Manual, Vol. 4 claims RAPL support for this CPU model (0x4D) - see Table 2-10 in the June 2021 SDM release.&amp;nbsp; So I am using direct MSR access instead.&lt;/P&gt;
&lt;P&gt;This CPU model has a unique RAPL MSR configuration.&amp;nbsp; Its power and energy units in MSR_RAPL_POWER_UNIT are like some other older Atom CPUs, but unlike other Silvermont CPUs, its time units and the MSR_PKG_POWER_LIMIT appear to use the traditional encodings, per Section 14.10.3 (June 2021 SDM).&lt;/P&gt;
&lt;P&gt;I am able to read the package power limits from the MSR, and the values appear reasonable after conversion.&amp;nbsp; However, when I try to write a new power limit, the write appears to be ignored and the old values remain.&amp;nbsp; I confirmed that the lock bit is not set.&amp;nbsp; For example, reading register 0x610 gives a value of 0x004688CA005B8753, but rejects my write after modifying bits 0-14 with new value&amp;nbsp;0x004688CA005B84E2 (to try and set PL1, though setting PL2 also fails).&lt;/P&gt;
&lt;P&gt;The same problem applies to the PP0 (core) domain, whose MSR exists but is not documented in the SDM.&lt;/P&gt;
&lt;P&gt;RAPL documentation for these C2000 CPUs is sparse, and the lack of Linux powercap support also raises questions about their RAPL capabilities.&amp;nbsp; Can anyone answer any of the following:&lt;/P&gt;
&lt;OL&gt;
&lt;LI&gt;If they've ever tried writing RAPL configurations for any C2000 series CPU (model 0x4D), and whether they were successful (or not).&lt;/LI&gt;
&lt;LI&gt;Why writing to the RAPL power limit registers are being ignored.&lt;/LI&gt;
&lt;LI&gt;Why there is no powercap support in the Linux kernel for this CPU model.&lt;/LI&gt;
&lt;/OL&gt;
&lt;P&gt;Thanks!&lt;BR /&gt;-Connor&lt;/P&gt;</description>
      <pubDate>Thu, 22 Jul 2021 15:14:40 GMT</pubDate>
      <guid>https://community.intel.com/t5/Software-Tuning-Performance/Cannot-configure-RAPL-on-Atom-C2558-Rangeley/m-p/1300615#M7918</guid>
      <dc:creator>connorimes</dc:creator>
      <dc:date>2021-07-22T15:14:40Z</dc:date>
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