ASM insn. support by proc. through API

Delta_0ne — Tue, 05 Nov 2024 18:09:16 GMT

Hi,
I'm working on a project involving a disassembler that runs on its own binary (the app binary) for proactive optimization and process impact analysis, which needs to support multiple architectures. Currently, fetching information from documentation is a lengthy and somewhat inefficient process.

It could be interesting to introduce a secure layer within the CPU's microcode that developers can access as an API. This would allow the CPU to directly inform the code about its capabilities. Such a feature would be incredibly useful for HPC applications, which need minimal latency and precise infrastructure capability assessments. For developers focused on ultra-low-level optimization, it would be invaluable.

This could significantly simplify the updating of profiling and disassembly applications and, in my case, eliminate the need to update this part of the application.

It would be even more valuable to use a straightforward data format with distinct segments for each section—such as prefixes, op_codes, etc.—allowing us to directly retrieve the hexadecimal values. Even better would be the inclusion of fields related to the number of CPU cycles per instruction.

To my knowledge, no other CPU manufacturer, provides this type of feature.

Thanks for considering this, and I appreciate any feedback,

Delta_0ne.

topic ASM insn. support by proc. through API in Software Tuning, Performance Optimization & Platform Monitoring

ASM insn. support by proc. through API