https://community.intel.com/t5/Software-Tuning-Performance/Rangeley-Recommended-reset-sequence-in-0xCF9/m-p/1739912#M8625 <P>Hello,</P><P>We have now rangeley-based custom boards in the fields since years, but from time to time, customers complain about a board freeze issue when rebooting.</P><P>&nbsp;</P><P>Board is freezing just after writing in the 0xCF9 register from inside linux to reset the processor. BIOS is not coming up anymore wihout unplugging/replugging the board.</P><P>&nbsp;</P><P>Current reset sequence is shown below. Is that the best one for this processor ?</P><P>Thanks.</P><P>Best regards,</P><P>&nbsp;</P><DIV>/* Reset generator IO port - Reset Control */</DIV><DIV>/* This register is named RC in Intel #516816 BWG */</DIV><DIV>#define RC_REG&nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp;0xcf9</DIV><DIV>#define RC_SRST&nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; 0x02</DIV><DIV>#define RC_RCPU&nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; 0x04</DIV><DIV>#define RC_FRST&nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; 0x08</DIV><DIV>&nbsp;</DIV><DIV>#define RANGELEY_RESET \</DIV><DIV><SPAN>do { \</SPAN></DIV><DIV><SPAN>&nbsp; outb_p(RC_SRST | RC_FRST, RC_REG); \</SPAN></DIV><DIV><SPAN>&nbsp; outb_p(RC_SRST | RC_RCPU | RC_FRST, RC_REG); \</SPAN></DIV><DIV><SPAN>} while (0)</SPAN></DIV> Fri, 06 Mar 2026 14:29:07 GMT PAgra 2026-03-06T14:29:07Z https://community.intel.com/t5/Software-Tuning-Performance/Rangeley-Recommended-reset-sequence-in-0xCF9/m-p/1739912#M8625 <P>Hello,</P><P>We have now rangeley-based custom boards in the fields since years, but from time to time, customers complain about a board freeze issue when rebooting.</P><P>&nbsp;</P><P>Board is freezing just after writing in the 0xCF9 register from inside linux to reset the processor. BIOS is not coming up anymore wihout unplugging/replugging the board.</P><P>&nbsp;</P><P>Current reset sequence is shown below. Is that the best one for this processor ?</P><P>Thanks.</P><P>Best regards,</P><P>&nbsp;</P><DIV>/* Reset generator IO port - Reset Control */</DIV><DIV>/* This register is named RC in Intel #516816 BWG */</DIV><DIV>#define RC_REG&nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp;0xcf9</DIV><DIV>#define RC_SRST&nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; 0x02</DIV><DIV>#define RC_RCPU&nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; 0x04</DIV><DIV>#define RC_FRST&nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; 0x08</DIV><DIV>&nbsp;</DIV><DIV>#define RANGELEY_RESET \</DIV><DIV><SPAN>do { \</SPAN></DIV><DIV><SPAN>&nbsp; outb_p(RC_SRST | RC_FRST, RC_REG); \</SPAN></DIV><DIV><SPAN>&nbsp; outb_p(RC_SRST | RC_RCPU | RC_FRST, RC_REG); \</SPAN></DIV><DIV><SPAN>} while (0)</SPAN></DIV> Fri, 06 Mar 2026 14:29:07 GMT https://community.intel.com/t5/Software-Tuning-Performance/Rangeley-Recommended-reset-sequence-in-0xCF9/m-p/1739912#M8625 PAgra 2026-03-06T14:29:07Z