Fifth, Intel says that 5560 exhibits "Greater Parallelism" by increasing amount of instructions that can be run "out-of-order", which enables more simultaneous processing & overlap latency. Intel has increased the size of out-of-order window & scheduler, giving a wider window. Intel has also increased size of other buffers(probably, Intel folks can be more descriptive on this) in the core to ensure they wouldn't become a limiting factor. I see these factors could be analyzed also w.r.t 5345 processor.
Sixth, 5560 claims for improved "Branch Prediction" by reducing the effective penalty of branch mispredictions overall w.r.t prior processors. Intel has added second level Branch Target Buffer (BTB) for the same. Check this?
Seventh, 5560 claims for improved hardware prefetch & better load-store scheduling which reduces memory access latency. Check this too?
Eight, 5560 removes lot of performance impact of using unaligned instructions, please try checking. There is lot said about fast unaligned loads, cache improvements with 5560, the need is if it can be addressed with types of applications Intel is talking about.Note: The idea of having inclusive L3 shared cache is to increase performance by reducing traffic to the processor cores, and also to reduce unnecessary core snoops.