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How do I get memory usage information in the system: interms of ??GB/s. How much from Processor?
There are some events like "Bus access from All agents", and "bus access from the processor", but it only tells you how much acess, not the actual memory bandwidth.
There are other events like "bus data ready from the processor" shows that how many bus cycles are being accessed by processor. But the number is not consistent with Cache misses I got.
There are some events like "Bus access from All agents", and "bus access from the processor", but it only tells you how much acess, not the actual memory bandwidth.
There are other events like "bus data ready from the processor" shows that how many bus cycles are being accessed by processor. But the number is not consistent with Cache misses I got.
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That's a great question, liang! I'll ask a few of the experts around these parts and ask them to post their thoughts here.
cheers
jdg
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I also have this question in mind.
Please also let me know about that.
Thx.
Please also let me know about that.
Thx.
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The Bus Data Ready event is most often used, in my limited experience, to determine the physical data rate. For Xeon/P4, this rate may be much higher than the useful data rate, particularly in cases of inefficient use of Read/Write Combining buffers. I don't know if you could correlate last level cache miss retired events with Bus Data Ready events, perhaps in cases where WCB use is efficient.
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