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From cycle accounting, my program have a high IMISS rate. I'd like to find out the exact location in code where they occurs. From Intel Itanium 2 Processor Reference Manual For software Development and Optimization Table 10-2, EAR event Instruction Cache seems able to provide this information. But I can not find L1I events to do what I want. Please help. Thanks.
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Paulina, look for the events that begin w/ IEAR
IEAR_LATENCY_ALL
IEAR_LATENCY_GE_4
IEAR_LATENCY_GE_8
...
birju
IEAR_LATENCY_ALL
IEAR_LATENCY_GE_4
IEAR_LATENCY_GE_8
...
birju

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