ITLB page walks != ITLB misses (?)

[stephs]

Hi,

Why isn't the number of ITLB page walks equal to the number of ITLB misses?

The VTune 6.1 reference says this about ITLB page walks: "This event counts the number of requests for a page walk due to an ITLB miss."
If the discrepancy were minute, I wouldn't mention it, but I'm getting 10x more page walks than misses.

There also seems to be an inconsistency between the events DTLB Load Misses, DTLB Store Misses, and DTLB Load and Store Misses. From the description, the last of the three should be equal to the sum of the first two, but I'm getting 2x more missed loads than I am missed_loads + missed_stores.

Does someone know what could be causing these results? If not, which statistics are most important (i.e. ITLB misses or ITLB page walks, missed_loads or missed_stores + missed_loads)?

Thanks for any clarification.

Message Edited by StephS on 03-10-2005 09:54 AM

Message Edited by StephS on 03-10-2005 09:55 AM

[Intel_C_Intel]

Do you use calibration? With calibration the Sample After Value is changed dynamically.

Note that the optimum Sample-After values for other EBS events are different than for Clockticks because the other EBS events occur at different frequencies (usually less frequently). The goal is to produce about 1000 samples per second for any EBS event.

Maybe different EBS events have different optimum sample values according to this quote.
But if the goal is to produce 1000 samples of all events, then all ratio's would be 1000/1000 = 1... .
That cannot be the goal now can it?

For example take these two events:
- Instructions Retired
- Branch Mispredictions Retired

If they both have a SAV that produces thousand events then the ratio Branch Mispredictions Retired/Instructions Retired would always be 1 and totally useless and incorrect.
(Why?) is it not better to have the same SAV for all events that can be used togeter to form a ratio?

[stephs]

I use calibration, but that shouldn't affect the actual number of events. If I remember correctly, calibration affects the number of times that VTune collects active instruction addresses.

[David_A_Intel1]

Hi StephS:

Well, the first problem, at least in version 7.2, is that the definition of the two events is exactly the same in the documentation! :-(

From the Intel Pentium 4 processor Optimization manual:

ITLB Page Walk Miss: The number of page walk requests due to ITLB misses.

ITLB Misses: The number of ITLB lookups that resulted in a miss. ITLB Page Walk Misses is less speculative than ITLB Misses and is the recommended alternative.

So, from the "real" definition, we can see that ITLB Misses is "speculative" and can result in higher counts. This means that because the architecture is pipelined, some portion of instructions may be decoded and executed ahead of time and when the processor realizes it doesn't need to execute the instruction(s), it throws away the intermediate results and no harm is done. Except, that some counters count events incurred by this speculative execution!!