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jgwohlbier

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02-17-2021
09:35 AM

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Hi,

I'm wondering specifically what is Advisor is reporting for GFLOPS and GINTOPS. Is it reporting instructions retired and account for vector instructions? I.e., would an 8-way vector fused multiply add instruction be counted as 16 operations?

Thanks!

jgw

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Zakhar_M_Intel1

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02-19-2021
02:52 AM

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Hi jgw,

For Advisor GINTOPS you can find instructions list at Advisor Integer Roofline article: https://software.intel.com/content/www/us/en/develop/articles/a-brief-overview-of-integer-roofline-m... , **quoted**:

*Currently, ADD, ADC, SUB, MUL, IMUL, DIV, IDIV, INC/DEC, shifts, rotates etc. are counted as INT Operations. For strict integer operation usage, which allows you to exclude the loop counter operations (INC/DEC, shift, rotate) which are not strictly calculations, set the environment variable: ADVIXE_EXPERIMENTAL=intops_strict This will lead to only counting ADD, MUL, IDIV and SUB operations.*

FLOPS and GINTOPS are implemented so that for each instruction you multiply by operand SIMD width and taking into account (for AVX-512) mask register values. Also, for FMAs and for VNNI we count them as > 1 op (specifically, 2 for FMA). That's actually why we position Advisor FLOPS/INTOPS collectors as "*Precise* FLOPS counting" analysis.

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Ruslan_M_Intel

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02-17-2021
11:45 PM

208 Views

Hi,

Yes, Advisor takes into account that FMA instruction is not single operation but it's a number of operations. Specifically, for N elements we have N multiplies and N additions (for each of mul result)

jgwohlbier

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02-18-2021
07:47 AM

186 Views

Thanks. Assuming that the count is based on retired instructions, would it be possible to get a list of instructions that result in counts as both GFLOPS and INTOPS?

Thanks.

jgw

Ruslan_M_Intel

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02-18-2021
08:16 AM

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jgwohlbier

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02-18-2021
09:14 AM

175 Views

Sorry, that's not what I meant.

I am interested in a list of instructions that result in GFLOPS counts, and a list of instructions that result in GINTOPS counts. I imagine it is all of the arithmetic instructions and vector variants of those instructions, both for floats and for ints, respectively.

Thanks.

jgw

Ruslan_M_Intel

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02-18-2021
09:35 AM

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Zakhar_M_Intel1

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02-19-2021
02:52 AM

152 Views

Hi jgw,

For Advisor GINTOPS you can find instructions list at Advisor Integer Roofline article: https://software.intel.com/content/www/us/en/develop/articles/a-brief-overview-of-integer-roofline-m... , **quoted**:

*Currently, ADD, ADC, SUB, MUL, IMUL, DIV, IDIV, INC/DEC, shifts, rotates etc. are counted as INT Operations. For strict integer operation usage, which allows you to exclude the loop counter operations (INC/DEC, shift, rotate) which are not strictly calculations, set the environment variable: ADVIXE_EXPERIMENTAL=intops_strict This will lead to only counting ADD, MUL, IDIV and SUB operations.*

FLOPS and GINTOPS are implemented so that for each instruction you multiply by operand SIMD width and taking into account (for AVX-512) mask register values. Also, for FMAs and for VNNI we count them as > 1 op (specifically, 2 for FMA). That's actually why we position Advisor FLOPS/INTOPS collectors as "*Precise* FLOPS counting" analysis.

RaeesaM_Intel

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02-24-2021
08:24 PM

102 Views

Hi,

Thank you for accepting the solution. We are discontinuing monitoring this thread. Please raise a new thread in case of any further issues.

Regards,

Raeesa

Zakhar_M_Intel1

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02-25-2021
11:39 PM

46 Views

.. And (in continuation)

For the **FLOP**/S tool here is a high level list of classes of instructions counted:

ADD, SUB, DIV, DP, MUL, ATAN, FPREM, TAN, SIN, COS, SQRT, SUB, RCP, RSQRT, EXP, VSCALE, MAX, MIN, ABS, IMUL, IDIV, FIDIVR, CMP, VREDUCE, VRND

For more complete information about compiler optimizations, see our Optimization Notice.