Query on ESCR registers

[mrshanbh]

Hello,

I do not know if this is the right forum to post this query, but here goes.....

My question is regarding the Performance Monitoring Events for Non-Retirement Counting under a Pentium 4 processor.

I am in the process of designing an Event Monitoring tool and for this i am referring to the following document: IA-32 Intel Architecture, Software Developers Manual, Volume 3 : System Programming Guide.

For theevents (in Appendix A1)"page_walk_type" and"BSQ_cache_reference"i have seen that the manual refers tosome non existent ESCRs.

page_walk_type : PMH_CR_ESCR0, PMH_CR_ESCR1

BSQ_cache_reference : BSU_CR_ESCR0, BSU_CR_ESCR1

The above mentioned ESCR registers do not seem be mentioned in the manual, or am i making some mistake ??

Can someoneaddress my queries ?

Mithun Shanbhag

Syracuse University

[jeffrey-gallagher]

Dear Mithun,

Nice to see this thoughtful post: good job!

For grins I went to google and checked out those events. I got multiple hits for both:

"page_walk_type" gave me 33 hits (Pentium 4 stuff)

and

"BSQ_cache_reference" gave about 309 hits (also Pentium 4)

In fairness, a few of the postings are complaints that competative products to VTune don't profile the events, but I only took a few seconds to scan a few of the hits. I'm guessing you can do much better, if you have a few minutes to explore.

Take a gander and see if that works for you, to assist you in your research.

cheers

jdg

[jeffrey-gallagher]

Mithun,

I'll ask around.

jdg

[jeffrey-gallagher]

Mithun,

Take a look here:

Table 15-2 in Vol 3 of IA-32 Intel Architecture Software Developers Manual.

cheers

jdg