I presume you are referring to Arria 10 NativePHY IP. In the IP, there is reconfiguration bus interface that user can use to access the register read/write of transceiver channel.
reconfiguration bus interface is build base on Altera Avalon Memory Map interface.
this is abei.
thank you for your answer.
I will study control using the Avalon bus based on the information by your answer.
If it is difficult for us, please support.
I have not hear back from you for some time.
For now, I am setting this case to closure first.
Feel free to file new forum thread if you have any enquiry in future.
No problem. It's good to know you are getting thing working in your project.
Alright, I am setting this case back to closure.
Feel free to file new forum thread if you have enquiry in future.