Application Acceleration With FPGAs
Programmable Acceleration Cards (PACs), DCP, FPGA AI Suite, Software Stack, and Reference Designs
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Cyclone V SEU FIT rate report

SajjaSiva
Beginner
1,132 Views

We are looking for Cyclone V family SEU (soft error, single event upset) FIT (failure in tine) rate report. Particularly looking for Cyclone V GX family - 5CGXFC7C6F23I7N. Could you please share the report or guide to the right place.

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NurAiman_M_Intel
Employee
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Hi SSajj1,

 

Thank you for contacting Intel Community.

 

For SEU FIT rate report, you can generate the report by using Quartus Prime with your Quartus design.

 

You may refer to youtube link below as it contain the complete step to generate SEU FIT report.

https://www.youtube.com/watch?v=eqcmuwGpGAI

 

You may start to generate the report by open up your Quartus Design in Quartus, then, apply “set_global_assignment –name SEU_FIT_REPORT ON” command in QSF file. Finally, compile the design and you can see the component usage report in “Fitter” -> “Resource Section” -> “Projected SEU FIT by Component Usage”.

 

Hope this will help you.

 

Thank you.

 

Regards,

Aim

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