Application Acceleration With FPGAs
Programmable Acceleration Cards (PACs), DCP, DLA, Software Stack, and Reference Designs
Announcements
Intel Support hours are Monday-Fridays, 8am-5pm PST, except Holidays. Thanks to our community members who provide support during our down time or before we get to your questions. We appreciate you!

Need Forum Guidance? Click here
Search our FPGA Knowledge Articles here.
422 Discussions

I/O Channel Emulation in the OpenCL code.

SBioo
Beginner
716 Views

Hi,

 

I have a piece of code, that maps a neural network onto the FPGA. In this code, different components of the layers are communicating through channels. Now, I would like to somehow use the available I/O channels on our available cards, but before that I would like to emulate my code with these new channels. I've realized that in the emulation mode, the code will generate I/O channels as files, and then both sides of the channels can read and write into it.

 

Unfortunately, it seems like the emulation does not work properly. The outcome of my design is being something weird. Not sure how the file reading/writing is being done in this mode, but it seems not working properly.

 

I wanna know if anyone had any experience with channel emulation and how it should be done properly?

 

Thanks.

0 Kudos
2 Replies
Fawaz_J_Intel
Employee
176 Views
Hello, I will go through your description and let you know the feedback soon, Thanks
Fawaz_J_Intel
Employee
176 Views
Hello, it depends on the code if it is going to generate the file or not. Usually for the read, you will need to provide the file to be read from and match the name with the io attribute that you define. For write, you can have a piece code which can check for a file with a particular name and if that doesn’t exist then it will create it. Thanks
Reply