PAC S10 board(D5005) Alt_sld_fab_0.alt_sld_fab_0: add_instance: Can't create component type altera_sld_agent_endpoint_tieoff Error opnening .../ipgen/alt_sld_fab_0/alt_sld_fab_0.ip

[SPour2]

When I am trying to synthesis ethernet example (eth_e2e_e10) for PAC S10 board(D5005) I am getting the following error. Could somebody help me?

Error (11176): Alt_sld_fab_0.alt_sld_fab_0: add_instance: Can't create component type altera_sld_agent_endpoint_tieoff

Error (11176): Error opening /root/shameer/eth_e2e_e10_1/build_synth/build/qdb/_compiler/afu_default/_flat/19.2.0/partitioned/1/.temp/sld_fabrics/ipgen/alt_sld_fab_0/alt_sld_fab_0.ip.

Detialed messages from syntheziser :

Error (11176): Alt_sld_fab_0.alt_sld_fab_0: add_instance: Can't create component type altera_sld_agent_endpoint_tieoff

Info (11172):    invoked from within

Info (11172): "add_instance sldfabric_t0 altera_sld_agent_endpoint_tieoff"

Info (11172):    ("eval" body line 7)

Info (11172):    invoked from within

Info (11172): "eval $tcl"

Info (11172):    (procedure "compose" line 36)

Info (11172):    invoked from within

Info (11172): "compose"

Info (11172):    invoked from within

Info (11172): "interp eval $slave {

Info (11172): Compose

Info (11172): }"

Warning (11175): Alt_sld_fab_0.alt_sld_fab_0.alt_sld_fab_0.splitter.nodes: Interface has no signals

Error (11176): Alt_sld_fab_0.alt_sld_fab_0.alt_sld_fab_0.ocpfabric.clock: ocpfabric.clock must be connected to a clock output

Info (11172): ***************************************************************

Info (11172): Quartus is a registered trademark of Intel Corporation in the

Info (11172): US and other countries. Portions of the Quartus Prime software

Info (11172): Code, and other portions of the code included in this download

Info (11172): Or on this DVD, are licensed to Intel Corporation and are the

Info (11172): Copyrighted property of third parties. For license details,

Info (11172): Refer to the End User License Agreement at

Info (11172):

Info (11172): ***************************************************************

Error (11176): Error opening /root/shameer/eth_e2e_e10_1/build_synth/build/qdb/_compiler/afu_default/_flat/19.2.0/partitioned/1/.temp/sld_fabrics/ipgen/alt_sld_fab_0/alt_sld_fab_0.ip.

Info (11172): ***************************************************************

Info (11172): Quartus is a registered trademark of Intel Corporation in the

Info (11172): US and other countries. Portions of the Quartus Prime software

Info (11172): Code, and other portions of the code included in this download

Info (11172): Or on this DVD, are licensed to Intel Corporation and are the

Info (11172): Copyrighted property of third parties. For license details,

Info (11172): Refer to the End User License Agreement at

Info (11172):

Info (11172): ***************************************************************

Info (11171): Finished IP generation for the debug fabric: alt_sld_fab_0.

Error (19882): Automatic debug logic insertion has failed.

Error: Flow failed:

Info (144001): Generated suppressed messages file /root/shameer/eth_e2e_e10_1/build_synth/build/output_files/afu_default.syn.smsg

Error: Quartus Prime Synthesis was unsuccessful. 5 errors, 127 warnings

   Error: Peak virtual memory: 6236 megabytes

   Error: Processing ended: Sun Jan 12 17:02:08 2020

   Error: Elapsed time: 00:01:23

Error (293001): Quartus Prime Full Compilation was unsuccessful. 6 errors, 127 warnings

Error (23035): Tcl error: ERROR: Error(s) found while running an executable. See report file(s) for error message(s). Message log indicates which executable was run last.

   while executing

"execute_flow -compile "

   (procedure "compile_pr_revision_impl" line 8)

   invoked from within

"compile_pr_revision_impl $impl_rev_name"

   (procedure "compile_pr_revision" line 11)

   invoked from within

"compile_pr_revision $options(impl)"

   (procedure "main" line 87)

   invoked from within

"main"

   invoked from within

"if {($::quartus(nameofexecutable) == "quartus") || ($::quartus(nameofexecutable) == "quartus_pro") || ($::quartus(nameofexecutable) == "qpro")} {

       #..."

   (file "./s10_partial_reconfig/flow.tcl" line 581)

------------------------------------------------

ERROR: Error(s) found while running an executable. See report file(s) for error message(s). Message log indicates which executable was run last.

   while executing

"execute_flow -compile "

   (procedure "compile_pr_revision_impl" line 8)

   invoked from within

"compile_pr_revision_impl $impl_rev_name"

   (procedure "compile_pr_revision" line 11)

   invoked from within

"compile_pr_revision $options(impl)"

   (procedure "main" line 87)

   invoked from within

"main"

   invoked from within

"if {($::quartus(nameofexecutable) == "quartus") || ($::quartus(nameofexecutable) == "quartus_pro") || ($::quartus(nameofexecutable) == "qpro")} {

       #..."

   (file "./s10_partial_reconfig/flow.tcl" line 581)

------------------------------------------------

Error (23031): Evaluation of Tcl script ./s10_partial_reconfig/flow.tcl unsuccessful

Error: Quartus Prime Shell was unsuccessful. 12 errors, 127 warnings

   Error: Peak virtual memory: 1306 megabytes

   Error: Processing ended: Sun Jan 12 17:02:11 2020

   Error: Elapsed time: 00:01:32

Quartus build failed

[SengKok_L_Intel]

Hi ,

May I know if you are using DCP 2.0.1? If yes, there is no 10G LL MAC example design.

Regards -SK

[SPour2]

Thanks for the reply.

Yes, I am using DCP 2.0.1. I didn't see eth_e2e_e10 example in samples folder of DCP 2.0.1 installation path.

But I have to transfer data through ethernet port of S10 PAC.

So I took eth_e2e_e10 example from 2.0.b339 and trying to fix errors.

Is there any example for ethernet data transfer along with DCP 2.0.1?

[SengKok_L_Intel]

Hi,

The DCP2.0.1 is not supporting the LL MAC 10G example design, this is why you can't find it in the package. It won't work if you copy the example design from the old version package. I will check with the Intel Marketing team, and see if there is other Ethernet design available for the DCP2.0.1 that can release.

Regards -SK

[SengKok_L_Intel]

Hi,

FYI, there is a plan to have the third party Ethernet MAC design work with DCP 2.0.1, but the detail will only be available in the next couple of weeks.

Regards -SK

[SPour2]

Thank for the info. Please let me know the details as and when it avaialable.

[SengKok_L_Intel]

Sure, I will provide you more info once this is available.

Regards -SK

[SengKok_L_Intel]

Hi,

I would suggest you contact your local Intel FPGA sales representative for requesting the third party MAC for DCP 2.0.1. This is because more detail information is required (e.g customer contact detail, number of licenses and maybe the pricing) in order to distribute the license and IP.

Regards -SK