Application Acceleration With FPGAs
Programmable Acceleration Cards (PACs), DCP, FPGA AI Suite, Software Stack, and Reference Designs
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Question about F-Tile FHT Reference Clock

Wangjun8
Beginner
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为什么F-Tile的FHT用过QSFP-112(400G光口,4*112Gbps)接口的时候需要两路参考时钟?其中一路参考时钟输入给REFCLK_FHTL12A,一路是需要输入给REFCLK_FGTL12A吗?

如下图所示的设计连接是否可行?QSFP-112.png

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Farabi
Employee
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English translation:

Why does F-Tile's FHT need two reference clocks when it uses QSFP-112 (400G optical port, 4*112Gbps) interface? One of the reference clocks is input to REFCLK_FHTL12A. Does the other one need to be input to REFCLK_FGTL12A?


Is the design connection shown in the picture below feasible?


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Farabi
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