Community
cancel
Showing results for 
Search instead for 
Did you mean: 
BZimm4
Beginner
840 Views

Using Questa Sim instead of IntelFPGA Starter Edition to build simulations

To whom it may concern:

 

We have a correctly licensed version of Questa Sim V10.7d(64 bit) and are trying to build the dma_afu simulation using Questa Sim instead of the built in Intel FPGA Starter Edition.

 

So far we have performed the following perquisite steps:

 

  1. Update Environment Variables - We updated the environment variables to point to the licensed version of Questa Sim instead of the Intel Starter Edition.
  2. Compile the ModelSim libraries for Questa Sim. The intel documenation references a verilog-library-setup.tcl and a vhdl-library-setup.tcl script file to compile the eda libraries for Questa Sim. Unfortunately the copies found were outdated and did not work. However, using the starter edition library viewer and the supplied files as references a new tcl script file was created which is attached.

 

#This file contains the commands to create libraries and compile the library file into those libraries.   set path_to_quartus /home/common/inteldevstack/intelFPGA_pro/quartus   # compiles all libraries vlib 220model vmap 220model 220model vcom -work 220model -2002 -explicit $path_to_quartus/eda/sim_lib/220pack.vhd vcom -work 220model -2002 -explicit $path_to_quartus/eda/sim_lib/220model.vhd   vlib 220model_ver vmap 220model_ver 220model_ver vlog -work 220model_ver $path_to_quartus/eda/sim_lib/220model.v   vlib lpm vmap lpm lpm vcom -work lpm -2002 -explicit $path_to_quartus/eda/sim_lib/220pack.vhd vcom -work lpm -2002 -explicit $path_to_quartus/eda/sim_lib/220model.vhd   vlib lpm_ver vmap lpm_ver lpm_ver vlog -work lpm_ver $path_to_quartus/eda/sim_lib/220model.v   vlib altera vmap altera altera vcom -work altera -2002 -explicit $path_to_quartus/eda/sim_lib/altera_europa_support_lib.vhd vcom -work altera -2002 -explicit $path_to_quartus/eda/sim_lib/altera_primitives_components.vhd vcom -work altera -2002 -explicit $path_to_quartus/eda/sim_lib/altera_primitives.vhd vcom -work altera -2002 -explicit $path_to_quartus/eda/sim_lib/altera_standard_functions.vhd vcom -work altera -2002 -explicit $path_to_quartus/eda/sim_lib/altera_syn_attributes.vhd   vlib altera_ver vmap altera_ver altera_ver vlog -work altera_ver $path_to_quartus/eda/sim_lib/altera_primitives.v   vlib altera_lnsim vmap altera_lnsim altera_lnsim vlog -sv -work altera_lnsim $path_to_quartus/eda/sim_lib/altera_lnsim.sv vcom -work altera_lnsim -2002 -explicit $path_to_quartus/eda/sim_lib/altera_lnsim_components.vhd   vlib altera_lnsim_ver vmap altera_lnsim_ver altera_lnsim_ver vlog -sv -work altera_lnsim_ver $path_to_quartus/eda/sim_lib/altera_lnsim.sv   vlib altera_mf vmap altera_mf altera_mf vcom -work altera_mf -2002 -explicit $path_to_quartus/eda/sim_lib/altera_mf_components.vhd vcom -work altera_mf -2002 -explicit $path_to_quartus/eda/sim_lib/altera_mf.vhd   vlib altera_mf_ver vmap altera_mf_ver altera_mf_ver vlog -work altera_mf_ver $path_to_quartus/eda/sim_lib/altera_mf.v   vlib cyclone10gx vmap cyclone10gx cyclone10gx vcom -work cyclone10gx -2002 -explicit $path_to_quartus/eda/sim_lib/cyclone10gx_atoms.vhd vcom -work cyclone10gx -2002 -explicit $path_to_quartus/eda/sim_lib/cyclone10gx_components.vhd   vlib cyclone10gx_ver vmap cyclone10gx_ver cyclone10gx_ver vlog -work cyclone10gx_ver $path_to_quartus/eda/sim_lib/cyclone10gx_atoms.v   vlib cyclone10gx_hip vmap cyclone10gx_hip cyclone10gx_hip vcom -work cyclone10gx_hip -2002 -explicit $path_to_quartus/eda/sim_lib/cyclone10gx_hip_components.vhd vcom -work cyclone10gx_hip -2002 -explicit $path_to_quartus/eda/sim_lib/cyclone10gx_hip_atoms.vhd   vlib cyclone10gx_hip_ver vmap cyclone10gx_hip_ver cyclone10gx_hip_ver vlog -work cyclone10gx_hip_ver $path_to_quartus/eda/sim_lib/cyclone10gx_hip_atoms.v   vlib cyclone10gx_hssi vmap cyclone10gx_hssi cyclone10gx_hssi vcom -work cyclone10gx_hssi -2002 -explicit $path_to_quartus/eda/sim_lib/cyclone10gx_hssi_components.vhd vcom -work cyclone10gx_hssi -2002 -explicit $path_to_quartus/eda/sim_lib/cyclone10gx_hssi_atoms.vhd   vlib cyclone10gx_hssi_ver vmap cyclone10gx_hssi_ver cyclone10gx_hssi_ver vlog -work cyclone10gx_hssi_ver $path_to_quartus/eda/sim_lib/cyclone10gx_hssi_atoms.v   vlib fourteennm vmap fourteennm fourteennm vcom -work fourteennm -2002 -explicit $path_to_quartus/eda/sim_lib/fourteennm_atoms.vhd vcom -work fourteennm -2002 -explicit $path_to_quartus/eda/sim_lib/fourteennm_components.vhd   vlib fourteennm_ver vmap fourteennm_ver fourteennm_ver vlog -sv -work fourteennm_ver $path_to_quartus/eda/sim_lib/fourteennm_atoms.sv   vlib fourteennm_ct1 vmap fourteennm_ct1 fourteennm_ct1 vcom -work fourteennm_ct1 -2002 -explicit $path_to_quartus/eda/sim_lib/ct1_hip_components.vhd vcom -work fourteennm_ct1 -2002 -explicit $path_to_quartus/eda/sim_lib/ct1_hip_atoms.vhd vcom -work fourteennm_ct1 -2002 -explicit $path_to_quartus/eda/sim_lib/ct1_hssi_components.vhd vcom -work fourteennm_ct1 -2002 -explicit $path_to_quartus/eda/sim_lib/ct1_hssi_atoms.vhd   vlib fourteennm_ct1_ver vmap fourteennm_ct1_ver fourteennm_ct1_ver vlog -sv -work fourteennm_ct1_ver $path_to_quartus/eda/sim_lib/ct1_hip_atoms.sv vlog -sv -work fourteennm_ct1_ver $path_to_quartus/eda/sim_lib/ct1_hssi_atoms.sv   vlib sgate vmap sgate sgate vcom -work sgate -2002 -explicit $path_to_quartus/eda/sim_lib/sgate_pack.vhd vcom -work sgate -2002 -explicit $path_to_quartus/eda/sim_lib/sgate.vhd   vlib sgate_ver vmap sgate_ver sgate_ver vlog -work sgate_ver $path_to_quartus/eda/sim_lib/sgate.v   vlib twentynm vmap twentynm twentynm vcom -work twentynm -2002 -explicit $path_to_quartus/eda/sim_lib/twentynm_atoms.vhd vcom -work twentynm -2002 -explicit $path_to_quartus/eda/sim_lib/twentynm_components.vhd   vlib twentynm_ver vmap twentynm_ver twentynm_ver vlog -work twentynm_ver $path_to_quartus/eda/sim_lib/twentynm_atoms.v   vlib twentynm_hip vmap twentynm_hip twentynm_hip vcom -work twentynm_hip -2002 -explicit $path_to_quartus/eda/sim_lib/twentynm_hip_components.vhd vcom -work twentynm_hip -2002 -explicit $path_to_quartus/eda/sim_lib/twentynm_hip_atoms.vhd   vlib twentynm_hip_ver vmap twentynm_hip_ver twentynm_hip_ver vlog -work twentynm_hip_ver $path_to_quartus/eda/sim_lib/twentynm_hip_atoms.v   vlib twentynm_hssi vmap twentynm_hssi twentynm_hssi vcom -work twentynm_hssi -2002 -explicit $path_to_quartus/eda/sim_lib/twentynm_hssi_components.vhd vcom -work twentynm_hssi -2002 -explicit $path_to_quartus/eda/sim_lib/twentynm_hssi_atoms.vhd   vlib twentynm_hssi_ver vmap twentynm_hssi_ver twentynm_hssi_ver vlog -work twentynm_hssi_ver $path_to_quartus/eda/sim_lib/twentynm_hssi_atoms.v
  1. This script file was imported into Questa Sim successfully via loading vsim and using Tools->Tcl->Execute Macro. The libraries were showed loaded/compiled with View->Library

 

Next we try to build the simulation project:

 

  1. cd to dma_afu directory
  2. build sim project

afu_sim_setup --source hw/rtl/filelist.txt build_sim
  1. cd build_sim
  2. build
make

We get the following error:

** Error (suppressible): (vlog-12110) All optimizations are disabled because the -novopt option is in effect. This will cause your simulation to run very slowly. If you are using this switch to preserve visibility for Debug or PLI features, please see the User's Manual section on Preserving Object Visibility with vopt. -novopt option is now deprecated and will be removed in future releases.  

This is because the script using to build the project generates the following in the Makefile:

 

######################################################################### # Questa Build Switches # ######################################################################### ## VHDL compile MENT_VCOM_OPT?= MENT_VCOM_OPT+= -nologo -work $(WORK)   ## VLOG compile # MENT_VLOG_OPT = -64 MENT_VLOG_OPT?= MENT_VLOG_OPT+= -nologo +librescan -work $(WORK) +define+$(SIMULATOR) -novopt MENT_VLOG_OPT+= -dpiheader work/dpiheader.h +incdir+$(DUT_INCDIR)+$(WORK) MENT_VLOG_OPT+= -sv -timescale $(TIMESCALE) -l vlog.log MENT_VLOG_OPT+= +define+$(ASE_PLATFORM) ifeq ($(GLS_SIM), 1) MENT_VLOG_OPT+= $(GLS_VERILOG_OPT) endif   ## VSIM elaboration, and run options # MENT_VSIM_OPT = -64 MENT_VSIM_OPT?= MENT_VSIM_OPT+= -c -l run.log -dpioutoftheblue 1 -novopt MENT_VSIM_OPT+= -sv_lib $(ASE_SHOBJ_NAME) -do $(PWD)/vsim_run.tcl MENT_VSIM_OPT+= -sv_seed 1234 # -voptargs="+acc"

If the two -novopt lines are edited to remove the -novopt then the make proceeds without issue.

 

  1. Now build simulator
sudo make sim

We get errors like

 

# ** Error: /home/common/file_dma/hw/rtl/BBB_ccip_avmm/hw/sim/../rtl/ccip_avmm_mmio.sv(89): Module 'scfifo' is not defined.  

Even though we can bring up vsim and find that specific library in altera_mf_ver

 

Help would be appreciated on missing steps.

0 Kudos
5 Replies
BZimm4
Beginner
231 Views

So we were able to make this process work; although it is far from ideal at the moment.

 

  1. Generate simulator project
afu_sim_setup --source hw/rtl/filelist.txt build_sim cd build_sim
  1. Remove -novopt from Makefile and make
sed -i 's/-novopt//' Makefile make
  1. Import Quartus EDA libs
cd work vsim Tools->Tcl->ExecuteMacro altera-lib_setup.tcl(macro posted above) exit Questa Sim cd ..
  1. try to make simulator
sudo make sim
  1. Add all missing module libraries explicitly to Makefile under the Questa Build Switches section
MENT_VSIM_OPT+= -L altera_mf_ver
  1. make simulator again
sudo make sim

At this point it should work.

231 Views

Hi,

 

I am looking into this case. Going through the details you shared you are following correct steps to simulate with Questasim. I Couple of questions.

  • You mentioned about script to compile the verilog/ vhdl libraries (verilog-library-setup.tcl ) that were outdated, can you point me where these scripts/ steps are located in documentation ?
  • Error for 'scfifo' not defined is an indication that either library is not compiled, or compiled but not specified in vsim command. Please share the log file that shows this Error along with the vsim command.
  • Lastly I understand you are able to make sim work, is it correct ?

 

Thanks,

Arslan

BZimm4
Beginner
231 Views

Arslan,

 

Sorry for the delay.

 

1 I was referred to the scripts from some documentation; however, the scripts came from here https://www.intel.com/content/www/us/en/programmable/support/support-resources/design-examples/desig....

 

2 If you do not add the extra library altera_mf_ver as described above then the error for missing libraries 'scfifo' and other will be replicated.

 

3 Yes, I was able to make QuestaSim work using the procedure detailed above.

 

Bryan

BZimm4
Beginner
231 Views

As a followup,

 

  1. Then generation of a simulation project via afu_sim_setup --source hw/rtl/filelist.txt build_sim which generates a -novopt option for QuestaSim is an errata as mentioned above as this option is deprecated and produces an error. I would please like to request that this be rectified through a patch or new release
  2. The best approach to a fully working simulation environment is still an open question because of the outdated scripts(new script posted above) and the need to manually add the library to the make file.

Bryan

 

231 Views

Hi Bryan, Are yuo using acceleration stack version 1.0 or 1.1 ? Thanks for the update. Here are few things I can take as a feedback from this thread. 1. Removal of depreciated '-novopt' option from the script 2. Add missing library 'altera_mf_ver' to the simulation script in vsim command. As for the library compilation, I believe you are referring to an outdated page, you should be referring to Quartus Prime handbook on simulation library compilation. Ref below. https://www.intel.com/content/www/us/en/programmable/documentation/gft1513990268888.html#mwh14099606... For our IP simulation setup, Library compilation steps are generated as part of simulation setup script, encapsulated to bypass for Modelsim Intel Edition and executed for Modelsim SE/PE, I can request team to make generate the library compilation script as part of make file generated in AFU simulation flow. Thanks, Arslan
Reply