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RSidh2
Beginner
269 Views

Why does the PCIe D5005 board (Stratix 10 FPGA) sometimes hang while testing the Streaming DMA AFU?

Hi All,

We have been trying to use the FPGA Streaming DMA AFU (Stratix 10 FPGA on PCIe D5005 board). We generated our .gbs file by using the run.sh script that shipped along with the AFU. We ran test cases of three types i.e (stream to memory, memory to stream , loopback) which transfers 100MB data in 1MB bits, these test cases were run 100 times with a sleep of 5 seconds between each operation. While it typically runs successfully, occasionally it hangs. Trying to reconfigure the FPGA using 'fpgaconf' after it hangs raises port errors as follows -

 

sysfs.c:1087:sysfs_write_u64() **ERROR** : Failed to write

reconf.c:215:clear_port_errors() **ERROR** : Failed to clear port errors

reconf.c:354:xfpga_fpgaReconfigureSlot() **ERROR** : Failed to clear port errors.

 

We also tried varying the sleep time between 0 seconds to 10 seconds, which did not resolve the problem. Appreciate any help with the issue.

 

Regards

r-s

 

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1 Reply
SengKok_L_Intel
Moderator
64 Views

Hi,

 

What is the OS and kernel version that you are using? Could you please provide the output of "fpgainfo fme" here?

 

Regards -SK

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