Hi, all.
Problem scenario:
1) After cold reboot, FPGA is uninitialized.
$ aocl diagnose
...
Physical Dev Name Status Information
pac_ec00000 Uninitialized ...2) Program arbitrary bitstream. (e.g., vector add) It always succeeds.
$ aocl program acl0 $OPAE_PLATFORM_ROOT/opencl/vector_add.aocx
... SUCCESS ...
$ $OPAE_PLATFORM_ROOT/opencl/exm_opencl_vector_add_x64_linux/vector_add/bin/host
... PASSED ...3) Program another bitstream. (e.g., hello_world) Now, the whole system stops(ssh disconnects, tty dies, ...) and automatically reboots after minutes.
$ aocl program acl0 $OPAE_PLATFORM_ROOT/opencl/hello_world.aocx
(system dies)4) Although the system dies, bitstream seems to be successfully programmed. I can run hello_world application without partial reconfiguration time (several seconds).
My guess: During partial reconfiguration, FPGA emits wrong signal (or jams) on PCIe bus, causing system down. Any solution to this?
