Turbo Cells: A High-Speed Intro to Intel Foundry’s Newest Feature for the Intel 14A Family

By Vic Vadi, Vice President, Intel 14A Technology Platform, Intel Foundry

Designers face a difficult tradeoff between high performance and low power, but what if you can have both? Each block has certain critical paths where every picosecond counts, which requires micro-optimizing timing and speed. In contrast, for the block's non-critical paths, minimizing the capacitance, leakage, and transistor width cell height can save overall power. Enter Turbo Cells — an innovative mix of boosted cell technologies from Intel Foundry. This hybrid standard cell technology blends the strengths of high-speed and low-power libraries into a single optimized solution. By enabling a streamlined mix of high-performance, low-power, and reduced-area (PPA) optimizations, Turbo Cells provide designers with the best of all three worlds — an innovation unique to the Intel 14A process node family, including Intel 14A-E.

Turbo Cells further enhance speed for central processing unit (CPU) maximum frequency and graphics processing unit (GPU) critical paths when paired with RibbonFET 2, our second-generation gate-all-around technology. The first of four Turbo Cell variations shown at Intel Foundry Direct Connect 2025 is now available for pre-process design kit (PDK) exploration, allowing designers to tailor the mix of high-performance and power-efficient cells to the needs of each application design block.

Addressing PPA Constraints for Key Applications

As process nodes shrink and performance demands grow, traditional standard cell libraries are hitting their limits. Turbo Cells are particularly well suited for performance-critical blocks that also face tight area or power constraints — a common challenge in modern system-on-a-chip (SoC) designs. For example, if cell height is aggressively shortened to reduce area, the maximum width of ribbon that fits in the cell will also shrink, resulting in lower peak drive current.

To unlock more performance with minimal effects on area or power, specialized double-height Turbo Cells deliver exceptionally high drive current in an area-efficient way. Turbo Cells offer a new level of flexibility for designers targeting aggressive PPA goals. And with tight integration into electronic design automation (EDA) flows, the plug-and-play design means Turbo Cells should be ready for use when the Intel 14A family comes to market.

Turbo Cells leverage wider transistor ribbons to deliver higher drive current in a compact layout. The way these ribbons are used creates unique optimization opportunities. For example, in CPU cores where timing closure on deep logic paths is essential, Turbo Cells can deliver higher drive current per area (higher ribbon width per area) than single-height cells.

In GPU pipelines or artificial intelligence (AI) accelerators where throughput and density must be balanced, Turbo Cells allow designers to selectively boost performance in bottleneck regions while maintaining compact layouts. Designers can mix and match performance-tuned and power-tuned cells in a block, achieving better area allocation, timing balance, and power efficiency without sacrificing layout regularity or tool compatibility. By enabling fine-grained tuning of performance and area, Turbo Cells help designers meet aggressive PPA targets across a wide range of applications.

In addition, Turbo Cells are valuable in clock distribution networks and data distribution from memory to computational engines. These cells also can improve signal integrity and power efficiency in custom data paths and data buses where precise control over transistor sizing and symmetry is needed, such as selectively optimizing NMOS or PMOS (N-channel or P-channel metal oxide semiconductor transistors) for rise-time/fall-time balancing. Turbo Cells can be used in one or both stages of large buffers to increase drive strength during structured routing of long-distance data buses — such as when transferring data from double data rate (DDR) memory through the network-on-chip (NoC) to compute cores.

Designing With Turbo Cells

For customer ease of use, we continue to work with EDA vendors to optimize their tools to use Turbo Cells. Available now in the Intel 14A family, Turbo Cells are ideal for heterogeneous designs where different parts of the chip have varying performance and power needs. This flexibility is especially valuable in complex SoCs that integrate CPUs, GPUs, AI accelerators, and I/O subsystems, allowing designers to apply Turbo Cells selectively across blocks to optimize for timing, power, or area. Overall, this makes the Intel 14A family a strong fit for mobile, edge, or AI inference workloads where designers want to push frequency or drive strength in localized hotspots without sacrificing the compact size of the design.

What’s Next

Every design has its own unique PPA trade-offs. With Turbo Cells, we're empowering designers to unlock the absolute maximum potential of their designs.

If you are interested in learning more about using Turbo Cells for your Intel 14A family applications, please reach out to our sales team at foundry.contact@intel.com.