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Intel® Quartus® Prime Software Version 21.3 Available NOW! Agilex™ Power and Performance, Nios V, Simulator Aware Signal Tap and More

Alexa_Labadie
Employee
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The latest version of Intel® Quartus® Prime software version 21.3 has been released. It introduces many new intuitive features and improvements that make it easier to design with Intel® FPGAs, including the new Intel® Agilex™ FPGAs.

These new features and improvements include:
• Improvements for Intel® Agilex™ FPGA power, performance, runtime, memory, and logic utilization†
• The first release of the Nios V/m microcontroller (the next generation of softcore processors based on the open-source RISC V architecture)
• New, faster compilation options for use during the early stages of development
• Signal preservation for use in RTL development and Platform Designer system development
• Incremental Signal Tap compilation, providing faster iterations during the debug cycle
• Simulator Aware Signal Tap (Beta) expanding the scope of visibility of the Signal Tap Logic Analyzer tool
• New and improved Design Assistant design rules for synthesis, clock domain crossing (CDC), reset domain crossing (RDC)
• Siemens EDA Questa*-Intel FPGA and Starter Edition simulators for faster 64-bit simulation
• And Many More

The new Intel Quartus Prime development software version 21.3 is available for immediate download. Click here.

 

Notices & Disclaimers
† Tests measure performance of components on a particular test, in specific systems. Differences in hardware, software, or configuration will affect actual performance. Consult other sources of information to evaluate performance as you consider your purchase. For more complete information about performance and benchmark results, visit www.intel.com/benchmarks.

Performance results are based on testing as of dates shown in configurations and may not reflect all publicly available updates. See backup for configuration details.

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About the Author
Program Manager, PSG Marketing