I'm designing a NIC that uses the E810-CAM2. It will have 2 QSPF+ cages. I'm following the reference design schematic for that configuration but there's a catch. My customer wants to be able to break-out the QSFP+ connections to (up to) 8 SFP 10G connections. This was a standard capability of past devices.
The 700 series controllers for example had dedicated LED pins, and if a port was enumerated and active, the corresponding LEDs would work using the Intel-provided firmware.
In the E810, the LED pins have been combined with (Q)SFP sideband/control pins into a group called "SDP" (Software Definable Pins). When I look at the few reference designs provided, there is ONLY either 4 or 8 SFP connectors OR 2X QSFP. Because of that, the firmware that goes with those configs sets the SDPs to different functions.
The datasheet says that up to 24 LEDs can be connected, but that would re-purpose ALL of the SDPs as LED-only, meaning the QSFP control pins would need to go somewhere else, presumably an I2C GPIO expander.
To throw another issue into the mix, PCIe gen 4 requires a discrete signal called "Power Brake" that connects to the card edge and is a signal from the motherboard having to do with power throttling. In every reference design from Intel, this signal is ALSO connected to one of the SDPs.
So my question is this: which firmware (there are 24 images total provided by Intel) would I use to be configured for the 2X QSFP, but allow up to 8 ports, and where is the reference design for that or where is the pinout config I'd need to wire up my schematic for 8X 3 = 24 status LEDs (each port is 3 LEDs: max/not-max speed and activity), 2 sets of QSFP control lines, AND the PCIe Power Brake line?
I realize the solution may be something similar to the 8X SFP which uses an I2C LED controller (effectively a GPIO expander), but I can't just assume to mix and match hardware because the firmware has to know what's connected to which pins and using an external I2C device requires the firmware code be written to talk to that device.
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