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Hi Intel,
We are planning to perform PCIe loopback in XEON-D-2187NT Processor PCIe port.
All we need is PCIe control register details for external/internal Loopback enable /disable.
We want to know the default status of the specific registers and after modification what will be the value we have to expect on the registers.
And also need to your quick support to perform External loopback test in PCIe ports.
Thanks and Regards,
Subramaniam
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Hello, @Subramaniam:
Thank you for contacting Intel Embedded Community.
We sent an email to the address associated with this account with information that may help you.
Best regards,

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