I am posting this question on behalf of our hardware engineer James. I am the software engineer developing the BIOS for a new Atom embedded design.
Our problem is that the Atom CPU asserts the ThermTrip# signal shortly after initialization. This occurs after the chip-set microcode has started execution, but before the Atom CPU fetches the first instruction.
The board is a custom design based on the Intel Swift Current 2 reference design. Here are the details of the hardware.
- CPU: Intel Atom Processor Z520PT (512K Cache, 1.33 GHz, 533 MHz FSB)
- Chip-set: Intel System Controller Hub US15WPT Chipset (Intel SCH US15WPT)
- RAM: Micron MT47H64M16HR-3 (8 Meg x 16 x 8 banks, 3.0ns @ CL = 5 DDR2-667)
- The RAM is operated in a single-channel configuration, with four chips to provide 64-bits of data.
- The memory is soldered onto the board (reference design uses sockets)
- SCH microcode is SchMicrocode _VLoD2.023x_HiD2015x.bin
We have the following SoftStraps settings in microcode.
- rank 1
- tcas 4
- trcd 4
- trp 4
- device density 1024Mbits
- device Width X16 devices
- lpc clock loads clk1 = 1, clk2 = 0
- FSB mode cmos
- FSB lane reversal not checked
- split Vtt disable
- erratum 75 enable
- erratume 72 enable
- ddr voltage 1.8V
Here is a bit more detailed description of the problem from our hardware engineer, James. The System Controller Hub starts loading the microcode but stops at ucode address D7FF. Then H_CPUPWRGD from the SCH goes true and ThermTrip# from the processor goes true at the same time. This causes a catastrophic shutdown. I think that the thermtrip# is completely erroneous since the processor is still cold and has been powered on for less than a second. Voltages look good and proper power sequencing has been observed. What could be causing the ThermTrip# ?
Any help is greatly appreciated.
I assume ThermTrip# signal is between CPU & IMVP chip
ThermTrip# pin is bidirectional & it may be asserted either by processor or IMVP ic.
In my case ThermTrip# pin was false triggered by IMVP IC which was not properly configured for required temperature.
Impact of ThermTrip# assertion cases TM2 to be enabled & processor gets throttled & alway operated at Low Frequency Mode.
I hope the above information be helpful.