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Hi,
Is there any way to get the E3800 to work with x16 DDR3 memories in memory-down ECC configuration? This is not a configuration that is validated by Intel but I can't see any reason it should not work.
Thanks,
Tim
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Hello Tim,
Thanks for contacting Intel Embedded Community.
Intel's suggestion in these cases for undocumented implementations is that these should be tested and validated from the customer side. The conditions and guidelines tested and confirmed by Intel are stated in the documentation.
Best Regards,
Carlos A.
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Hi Carlos,
Yes, I understand that this is Intel's position, but my question is really around how we can actually get this configuration to work. Is this something in the MRC that is fixed and hence will never work, or is there a way that the FSP can be made to recognise this configuration? So far we have tried and failed to make this work but cannot see why this should be the case.
Regards,
Tim
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Hi Tim,
It is likely that the MRC code will need to be modified to take account of the unsupported configuration. I'm not sure whether you have access to BIOS source code but, if not, Ircona could either provide it to you or assist you in finding a working solution.
Please let me know if you would like to discuss this further
Thanks
John
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Hi John,
Thanks for your response. Sounds like it may be worth a quick discussion to see what the options are. Is modifying MRC something you have done before?
Regards,
Tim
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Hi Tim,
Yes, we have implemented modifications to all areas of the BIOS including the MRC code. Perrhaps we can continue this discussion outside the forum. Please drop me an email at mailto:john.doody@ircona.com john.doody@ircona.com
Thanks
John

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