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NDeLa2
Beginner
1,224 Views

BSDL Files X710/X557/82580EB

Looking for BSDL files for X710/X557/82580EB.

 

I've read that an NDA may be needed. If someone contacts me I will send the NDA so I can receive the BSDL files.

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16 Replies
Adolfo_S_Intel
Moderator
606 Views

Hello @NDeLa2​ 

 

We will provide more information as soon as possible.

 

Best Regards,

Adolfo Sanchez

CarlosAM_INTEL
Moderator
606 Views

​Hello, @NDeLa2​:

 

Thank you for contacting Intel Embedded Community.

 

The Intel X557 10GBASE-T [Coppervale] Boundary Scan Description Language [BSDL] File document # 559446, Intel 82580 Gigabit Ethernet Controller [Barton Hills] BSDL document # 427919, Intel Ethernet XL710 10 GbE/ 40 GbE Controller [Fortville] BSDL document # 543847, and Intel Ethernet XXV710 BSDL document # 572653 can be found when you are logged into your Resource & Design Center (RDC) privileged account at the following websites:

 

http://www.intel.com/cd/edesign/library/asmo-na/eng/572162.htm

http://www.intel.com/cd/edesign/library/asmo-na/eng/427919.htm

http://www.intel.com/cd/edesign/library/asmo-na/eng/543847.htm

http://www.intel.com/cd/edesign/library/asmo-na/eng/572653.htm

 

The RDC Account Support form is the channel to process your account update request. It can be found at:

 

https://www.intel.com/content/www/us/en/forms/design/contact-support.html

 

Best regards,

@Mæcenas_INTEL​.

NDeLa2
Beginner
606 Views

Hi,

 

I was able to register for RDC and access the above links, except for the document# 427919. For that link I get an error:

 

"There was an error processing the last request.

You will be redirected to a help page in 2 seconds.

If you are not redirected, please click this link"

 

Thanks,

 

Noah

CarlosAM_INTEL
Moderator
606 Views

Hello, @NDeLa2​:

 

Thanks for your update.

 

We suggest you report the cited problem by filling out the form cited on our previous communication.

 

Best regards,

@Mæcenas_INTEL​.

NDeLa2
Beginner
606 Views

Hi,

 

For everyone's benefit, the problem was resolved via support email chain:

 

"Thank you for your patience. For the document 427919, we were able to coordinate this with the document owners and just to inform you, this document has been updated.

Kindly see if you can now access this particular document. Here's the link: https://www.intel.com/content/www/us/en/secure/design/internal/content-details.html?DocID=427919

You may also refer on this download link: 

https://cdrdv2.intel.com/v1/dl/getContent/427919 "

Thank you for your assistance.

CarlosAM_INTEL
Moderator
606 Views

Hello, @NDeLa2​:

 

Thanks for your update.

 

We are glad that the problem has been solved.

 

Best regards,

@Mæcenas_INTEL​.

NDeLa2
Beginner
606 Views

Hi @Mæcenas_INTEL,

 

Since downloading the Intel X557 10GBASE-T [Coppervale] Boundary Scan Description Language [BSDL] File document # 559446, I have had some trouble getting the BSDL files to work. There are 4 different BSDL files provided for the same X557-AT2 device. I am not familiar with devices requiring more than one BSDL. My JTAG software (Corelis ScanExpress) ran into errors when trying to use the default files. The files are:

 

X557-AT2_port0_BSDL_RSTLow.bsdl

X557-AT2_port1_BSDL_RSTLow.bsdl

X557-AT2_port0_BSDL_RSTHigh.bsdl

X557-AT2_port1_BSDL_RSTHigh.bsdl

 

I attempted using the first 2 from that list, and got an error about "no connection from TDI to TDO." I sent my project to Corelis for support and they said they didn't know the structure of the device, there is nothing in the datasheet about it. But they tried editing the BSDL to connect TDO of port 0 to TDI of port 1.:

 

-- MOD Make connection between port0 tdo to port 1 tdi

"TDO : port01_tdi_tdo," &

-- "TDO : L15," &

 

If this is not done then port 0 and port 1 do not connect and it produces an error. However, what they did was a complete guess - and I don't yet have the hardware to test their solution yet, so I figured I would come here and see if anyone can offer me guidance on using BSDLs for the X557.

 

Thanks,

Noah

 

CarlosAM_INTEL
Moderator
606 Views

Hello, @NDeLa2​::

 

Thanks for your update.

 

We have contacted you via email in order to help you.

 

Best regards,

@Mæcenas_INTEL​.

NDeLa2
Beginner
537 Views

Hi,

I am still having trouble getting the X557 bsdl to work.

In a previous support email, I was sent an svf to init the x557:

! SVF Implementation of the following Design Warning The sequence is repeated twice enable both DIE.
!
!attribute DESIGN_WARNING of JLX557_AT2: entity is
! "The TDO output is set to OD (Open Drain) mode by default." &
! "The private instruction TOPSEL_TDO_3S_MODE must be used in order to" &
! "get a solid voltage high value without external pull-up devices." &
! "IR code: (1001101)" &
! "DR code: (1)" &
! "For the package with N dice, Load IR and Load DR need to be repeated" &
! "N times consecutively in order to set all N dice into 3 state mode.";

!Reset the device
TRST ON
TRST OFF

!!JTAG Compliance Sequence
SIR 14 TDI (26CD);
SDR 2 TDI (3);

SIR 14 TDI (26CD);
SDR 2 TDI (3);

However, this seems to be a chicken and egg situation. How do I initialize the chip when I can't talk to it since this chip is taking down the JTAG chain by not functioning?

Furthermore, the info on JTAG in the datasheet is not consisent. In section 9.2, it describes the TAP as "3.3V only," however, everywhere else it says JTAG signals are on the VDD_IO domain which is 2.5V. So what should these signals be? 3.3V or 2.5V?

CarlosAM_INTEL
Moderator
528 Views

Hello, @NDeLa2:

Thanks for your reply.

We suggest verifying that your affected design fulfills the JTAG interface requirements stated in the Schematic Checklist tab of the Intel® X557 10 GbE Controller Checklists included in the Intel Ethernet Controller XL710/X557-AT4 Quad Port Reference Schematics and Checklists document # 556680.  You should be logged into your RDC privileged account to find the cited document on the following website:

https://cdrdv2.intel.com/v1/dl/getContent/556680

You should fill out the form stated on the following website when you have problems with the provided website or want to update your RDC account:

https://www.intel.com/content/www/us/en/forms/support/my-intel-sign-on-support.html

Best regards,

@CarlosAM_INTEL.

NDeLa2
Beginner
479 Views

Hi Carlos, thank you for the reply.

I reviewed the design checklists and my JTAG circuit is compliant.

I measured all 5 JTAG signals with a scope. All of them are behaving as expected with good logic levels close to the required 2.5V. I see activity on all 5 except for TDO, which stays at 2.5V and does not toggle.

I still think there may be something wrong with the BSDL, as both TDI and TDO are listed as same pin for port 0 and port 1 though this is not possible - there should be some kind of internal connection between the TDI of port 0 and TDO of port 1. I also tried treating the device as port0 only but could still not get any output on TDO.

Were the BSDL files verified on some type of eval board?

CarlosAM_INTEL
Moderator
472 Views

Hello, @NDeLa2:

Thanks for your reply.

We suggest implementing the workaround for the erratum DNV43. You can find this information on page 49 of the  Intel Atom Processor C3000 Product Family Specification Update - NDA document # 543847. You can find this document when you are logged into your Resource and Design Center (RDC) privileged account on the following website:

https://cdrdv2.intel.com/v1/dl/getContent/543847

You should fill out the form stated on the following website when you have problems with the provided website or want to update your RDC account:

https://www.intel.com/content/www/us/en/forms/support/my-intel-sign-on-support.html

Best regards,

@CarlosAM_INTEL.

 

NDeLa2
Beginner
460 Views

Carlos,

Thanks for the quick response.

Document 558240, design checklist for X557 states that TDO pullup should be 10kohms to 2.5V.

Document 572409 is a spec update for the intel atom, and errata DNV43 speaks of changing an "on-platform" pullup from 51 ohms to 475 ohms.

I am confused by this suggestion, as it is for a different chipset - unless you just meant in general, decreasing pullup values such that V_OL will be allowed to move lower, ensuring logic lows are received. However, section 6.6 of the datasheet states that V_IL=.75V (30% vdd_io) and I know my lows are well below that threshold coming into the chip (I measured 0.3-0.4V).

Let me know your thoughts. Thanks

CarlosAM_INTEL
Moderator
397 Views

Hello, @NDeLa2:

Thanks for your reply.

Since each port of X557 is composed of a single die with its own TAP controller and the scan chains are connected serially, each die needs to be initialized for the BSDL to function properly. Could you please clarify that you are using -AT2 or -AT4?

We are waiting for your anwer.

Best regards,

@CarlosAM_INTEL.

NDeLa2
Beginner
393 Views

Hello @CarlosAM_INTEL great to hear from you.

I am using the -AT2 chip. Any info you can provide is appreciated.

I am wondering how I can initialize a die since the X557 breaks the JTAG chain if it is uninitialized. I guess there must be a way to initialize other than JTAG?

Regards,

Noah

CarlosAM_INTEL
Moderator
374 Views

Hello, @NDeLa2:

Thanks for your reply.

We have contacted you via email using the address associated with your community account.

Best regards,

@CarlosAM_INTEL.

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