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Hi,
we developed custom board based on Intel Xeon D-1559 processor. It has 2 ports of 10G Base KR - SFP+ ports on the board. we are now performing electrical validation of these two ports using pre-compliance scope software. Kindly suggest how do we generate the below test patterns
- How to generate 8 ZEROS and 8 ONES Pattern?
- How to generate PRBS31 Pattern?
- How to put PHY into a Loopback for RX Testing on both ports
- How to gain access to 10G PHY TX registers to tune emphasis values in case failures are encountered on TX side?
- How to gain access to 10G PHY RX registers to tune EQ values in case failures are encountered during RX testing?
Request your support for the same
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Hello, @KMANO3:
Thank you for contacting Intel Embedded Community.
Could you please clarify if this forum is related to the following thread?
https://community.intel.com/t5/Embedded-Server/Test-pattern-generator-for-10G/m-p/1205787#M638
We are waiting for your clarification.
Best regards,
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Hi,
Yes it is same thread which we had it in embedded community forum. Can you suggest if there is any tools available to run and generate the required test patterns?
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Hello, @KMANO3:
Thanks for your confirmation.
We suggest following our answers on the cited thread to avoid duplicate efforts to help you.
Best regards,

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