we developed custom board based on Intel Xeon D-1559 processor. It has 2 ports of 10G Base KR - SFP+ ports on the board. we are now performing electrical validation of these two ports using pre-compliance scope software. Kindly suggest how do we generate the below test patterns
- How to generate 8 ZEROS and 8 ONES Pattern?
- How to generate PRBS31 Pattern?
- How to put PHY into a Loopback for RX Testing on both ports
- How to gain access to 10G PHY TX registers to tune emphasis values in case failures are encountered on TX side?
- How to gain access to 10G PHY RX registers to tune EQ values in case failures are encountered during RX testing?
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