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I have encountered two BSODs (bug check 0x124) on two different devices using Intel Celeron 3765U @ 1.9 GHz.
Additional parameters provided by the bug check:
1. 0, 0xFFFFFA800532A038, 0xBE000000, 0x100110B
2. 0, 0xFFFFFA800530C038, 0xBE000000, 0x100117B
Have created a support ticket at Microsoft and support engineer asked me to check contents of the MCI_STATUS MSR with Intel.
So here it is:
1. MCi_STATUS MSR = 0x00000000BE000000000000000100110B
2. MCi_STATUS MSR = 0x00000000BE000000000000000100117B
Additionally a support engineer at Intel already opened the case# 02812568.
Is it possible to gain more information from the contents of the MCI_STATUS MSR?
Thank you very much in advance.
BR,
Matthias
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Hello, matgst::
Thank you for contacting Intel Embedded Community.
The information that may help you is stated in sections 15.3.2.2, 15.9, and 16; on pages from 3172 to 3175, from 3186 to 3192, and from 3203 to 3236 of the https://software.intel.com/sites/default/files/managed/39/c5/325462-sdm-vol-1-2abcd-3abcd.pdf Intel(R) 64 and IA-32 Architectures Software Developer's Manual Combined Volumes: 1, 2A, 2B, 2C, 2D, 3A, 3B, 3C, 3D and 4 document # 325462.
We hope that this information is useful to you.
Best regards,
Carlos_A.
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Hi Carlos,
It looks to me like Cache Hierarchy Errors with unknown transaction type and hierarchy level (one is cache eviction error).
My understanding is family=6 and model=0x3D for Celeron 3765 U @ 1.90 GHz (Dual Core) but I could not find a section in chapter 16 for this CPU to interpret the model specific error code (0x0100). Is there a separate Software Developer's Manual for this architecture?
Best Regards,
Gary
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Hello, Swalling:
Thank you for contacting Intel Embedded Community.
The http://ark.intel.com/products/84812/Intel-Celeron-Processor-3765U-2M-Cache-1_90-GHz Intel(R) Celeron(R) Processor 3765U is part of the https://www.intel.com/content/www/us/en/embedded/products/broadwell-u/specifications.html 5th Generation Intel(R) Core(TM) Processors Based on the Mobile U-Processor Line also named Broadwell-U.
Due to this fact, the information that may help you is stated in sections 18.12 and 2.13; on pages 18-73, 18-74 (3375 and 3376); also 2-223, 2-224, 2-225, and 2-226 (from 4479 to 4482) of the https://software.intel.com/sites/default/files/managed/39/c5/325462-sdm-vol-1-2abcd-3abcd.pdf Intel(R) 64 and IA-32 Architectures Software Developer's Manual Combined Volumes: 1, 2A, 2B, 2C, 2D, 3A, 3B, 3C, 3D and 4 document # 325462.
We hope that this information is useful to you.
Best regards,
Carlos_A.
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