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Hello
I see on RVP7 CRB schematics, page 49, that CFG[4] signal is tied up to VCCIO.
However, Skylake EDS, Vol1 on page 49 (too:)) says that "eDP port is Disabled if No Connect Pull-Down resistor on CFG[4]"
Does it mean that eDP port won't work on RVP7 board?
Is it possible to correct this by software? I have Skylake-U COM board on my table now. It does not work with eDP port, probably because of this issue.
With best regards,
Nikolay
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Hello DarkTiger
According to the Schematics Jumper J6A3 connects a pulldown resistor to CFG<4>.
Have you confirmed that the jumper is present?
Are you testing eDP connectivity on BIOS or when OS Load?
Best Regards,
Adolfo Sanchez.
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Hello DarkTiger
According to the Schematics Jumper J6A3 connects a pulldown resistor to CFG<4>.
Have you confirmed that the jumper is present?
Are you testing eDP connectivity on BIOS or when OS Load?
Best Regards,
Adolfo Sanchez.
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Hello AdolfoS
Oh, sorry! Now I see this jumper on RVP7 schematics. Thank you.
It's engineering sample of COM Express Type 6 board, not RVP7.
Really, I'm trying to find out why I can't see BIOS screen on eDP panel. And I don't see BIOS screen even on serial console redirection, so I suspect that the board can't start at all.
With best regards,
Nikolay
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Hello DarkTiger
Thanks for your feedback.
I'm not familiar with the board that you are mentioning.
Is it an Intel board?
Do you have any specific board number, that we could search? This might help us find troubleshooting documentation for your case.
Was the board Dead on Arrival, or it worked before?
Best Regards,
Adolfo
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Hello AdolfoS
It's not Intel's RVP board. It's by COM Experess spec:
https://www.picmg.org/openstandards/com-express/ https://www.picmg.org/openstandards/com-express/
Sorry, I can't give details in the forum - we have early engineering samples from one of brands under strong NDA restrictions.
The problem that DisplayPort pins were set wrong, so we cannot enter into BIOS to correct it - we can't see a screen. And, as board can't start, we can't enter even using ssh.
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Hello DarkTiger
Thanks for your clarification on your situation.
Since the board you are using was developed by a third party company, there is little support that we can offer.
Hopefully they will be able to provide a solution for your issue, otherwise they should contact us directly to work on correcting the problem.
As a workaround you could try setting a different display output as primary on VBIOS stage, but that of course is under the assumption that additional ports have been implemented on the board.
Best Regards,
Adolfo Sanchez
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