40Gb Ethernet HSSI MAC/PHY IP does not work on Arria-10

[SXian3]

Hi,

I am trying to run the 40Gb Ethernet MAC/PHY IP provided by the OPAE. I am using the fpga-pac-a10 severs. Two problems I have here:

1. When testing the pre-built GBS from the example design with `hssi_loopback` utility, it complains that it cannot initialize the AFU.

$ hssi_loopback readmacs -B 0xAF Found e40 Error initializing accelerator

2. I also developed a simple AFU using `eth_e2e_e40` module provided in the example design. When running the example on Arria-10, the start signal of this module was set high, but the module never receives any non-zero PrMgmtCmd from the HSSI interface, and the `init_done` signal is always low (i.e. it is never initialized properly).

The PrMgmtCmd should have been configured correctly by writing the corresponding CSRs in the software using the `fpgaHssiSendPacket` API. What is the problem here?

Also, I am wondering if the fpga-bdx-opae platform can support the HSSI networking feature? It seems that this integrated FPGA-CPU platform should have support for HSSI: https://opae.github.io/latest/docs/fpga_tools/hssi_config/readme.html. But I go another another error when compiling the program (if I use the hssi interface in the AFU top-level module)

Error: ccip_std_afu needs port hssi:raw_pr that a10_gx_intg_xeon_bdx doesn't offer Error: "afu_platform_config --qsf --tgt platform --src=../../hw/rtl/eth_e2e_e40.json a10_gx_intg_xeon_bdx" failed

[Caguicla_Intel]

Hello SXian3,

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