I have an embedded device on which we use the 82574L. The old version used an Atom 3xxx processor with a PCI bus and the network on an card on the bus. Everything works fine. We have updated to an I7 and PCIe (both are PC104 boards). This is board is not running an OS.
Receiving data works fine. When sending data packets, I am having problems.
Following the data sheet, I setup a transmit ring queue of N descriptors. As I setup each descriptor, I set the tail pointer to beyond the next descriptor.
For the first N tries, it works fine. When the queue rolls over, that buffer never completes.
For N=3, I fill desc and set tail to 1, get status complete in status field readback of head register: 1
fill desc and set tail to 2, get status complete in status field readback of head register: 2
fill desc and set tail to 0, get status complete in status field readback of head register: 3
fill desc and set tail to 1, status never changes, packet is not sent readback of head register: 3
The thing that looks strange is that the I would assume the head register should be wrapping back to 0, but I don't see that.
Note I am NOT writing to the head register (except at initialization time), just reading it.
In the test, there is never more than 1 packet being processed at any one time.
Any hints would be appreciated
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