Hello Wired Ethernet Intel Community,
I have use INTEL I210,But I have some confused.
Because INTEL I210 (layout check list ) mention that for highly dense platforms PCIe design would be to have coupling capacitors in a staggered formation
but,in some INTEL document and non-INTEL document mention that differential coupling capacitors in a staggered formation prohibited.
Which is Right?
Thank you for posting in Wired Communities. With regards to the design and specification inquiry of the ethernet controller, you may try posting your inquiry at embedded support at
http://embedded.communities.intel.com/ for assistance.