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Receive Interrupt Enable of EMAC controller on Cyclone V gets disabled on its own.

Altera_Forum
Honored Contributor II
2,089 Views

Hi, 

 

I have written an Ethernet driver for an rtos for Cyclone V board's GMAC controller. The driver works good with reasonable amount of traffic. But when I storm my target with continuous packets of 60 bytes somehow the receive interrupt enable in DMA interrupt enable register gets disabled automatically without any code actually disabling it. Can somebody help on whats going on here? 

 

Regards, 

Mughees Ahmed Chohan
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4 Replies
Altera_Forum
Honored Contributor II
536 Views

Hi Mughees, 

Could you please attach the DMA descriptor and GMAC register dumps before this issue occurs and also the dumps for the same after this issue occurs? 

Thanks, 

Sue
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Altera_Forum
Honored Contributor II
536 Views

Hi Sue, 

 

Thanks a lot for your reply. The issue has been fixed now. Was a generic logic issue in my driver. Thanks Again. 

 

Best Regards, 

Mughees
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Altera_Forum
Honored Contributor II
536 Views

Thanks for letting me know Mughees.  

 

Sue
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Altera_Forum
Honored Contributor II
536 Views

Hello Mughees, 

 

Are you willing to share the driver you have written? 

 

Regards, 

 

Sander Weijers
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