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idata
Community Manager
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Some values are needed for implementing IEEE1588 on 82599 NIC.

I am trying to porting the BSD source codes for IEEE 1588 supports on 82599 NIC.

This is the URL of my reference code.

http://gitorious.org/freebsd/freebsd/blobs/9a6ef67a282598a5250072b04fc418d5b6f9e72c/sys/dev/ixgbe/ix... http://gitorious.org/freebsd/freebsd/blobs/9a6ef67a282598a5250072b04fc418d5b6f9e72c/sys/dev/ixgbe/ix...

I can't get any idea about the below red values.

I think somebody should know about these values, because you have already supported the hwtstamp for 82580 and 82576 on Ubunt Server.

Is there anyone who can tell me the right values and who can explain what this codes mean?

516 # ifdef IXGBE_IEEE1588

 

/* Setup the timer : IEEE 1588 support */

 

adapter->cycles.read = ixgbe_read_clock;

 

adapter->cycles.mask = (u64)-1;

 

adapter->cycles.mult = 1;

 

adapter->cycles.shift = IXGBE_TSYNC_SHIFT;

IXGBE_WRITE_REG(&adapter->hw, IXGBE_TIMINCA, (1<<24) |<p> 

IXGBE_TSYNC_CYCLE_TIME * IXGBE_TSYNC_SHIFT);

IXGBE_WRITE_REG(&adapter->hw, IXGBE_SYSTIML, 0x00000000);

 

527 IXGBE_WRITE_REG(&adapter->hw, IXGBE_SYSTIMH, 0xFF800000);

And these are the partial source codes of the Ubuntu's Intel igb driver. (Ubuntu11.04 and the kernel version is 2.6.38)

from the igb.h

335 # define IGB_82576_TSYNC_SHIFT 19

 

336 # define IGB_82580_TSYNC_SHIFT 24

from the igb_main.c

2157 /**

 

2158 * igb_init_hw_timer - Initialize hardware timer used with IEEE 1588 timestamp

 

2159 * @adapter: board private structure to initialize

 

2160 *

 

2161 * igb_init_hw_timer initializes the function pointer and values for the hw

 

2162 * timer found in hardware.

 

2163 **/

 

2164 static void igb_init_hw_timer(struct igb_adapter *adapter)

 

2165 {

 

2166 struct e1000_hw *hw = &adapter->hw;

 

2167

 

2168 switch (hw->mac.type) {

 

2169 case e1000_i350:

 

2170 case e1000_82580:

 

2171 memset(&adapter->cycles, 0, sizeof(adapter->cycles));

 

2172 adapter->cycles.read = igb_read_clock;

 

2173 adapter->cycles.mask = CLOCKSOURCE_MASK(64);

 

2174 adapter->cycles.mult = 1;

 

2175 /*

 

2176 * The 82580 timesync updates the system timer every 8ns by 8ns

 

2177 * and the value cannot be shifted. Instead we need to shift

 

2178 * the registers to generate a 64bit timer value. As a result

 

2179 * SYSTIMR/L/H, TXSTMPL/H, RXSTMPL/H all have to be shifted by

 

2180 * 24 in order to generate a larger value for synchronization.

 

2181 */

 

2182 adapter->cycles.shift = IGB_82580_TSYNC_SHIFT;

 

2183 /* disable system timer temporarily by setting bit 31 */

 

2184 wr32(E1000_TSAUXC, 0x80000000);

 

2185 wrfl();

 

2186

 

2187 /* Set registers so that rollover occurs soon to test this. */

 

2188 wr32(E1000_SYSTIMR, 0x00000000);

 

2189 wr32(E1000_SYSTIML, 0x80000000);

 

2190 wr32(E1000_SYSTIMH, 0x000000FF);

 

2191 wrfl();

 

2192

 

2193 /* enable system timer by clearing bit 31 */

 

2194 wr32(E1000_TSAUXC, 0x0);

 

2195 wrfl();

 

2196

 

2197 timecounter_init(&adapter->clock,

 

2198 &adapter->cycles,

 

2199 ktime_to_ns(ktime_get_real()));

 

2200 /*

 

2201 * Synchronize our NIC clock against system wall clock. NIC

 

2202 * time stamp reading requires ~3us per sample, each sample

 

2203 * was pretty stable even under load => only require 10

 

2204 * samples for each offset comparison.

 

2205 */

 

2206 memset(&adapter->compare, 0, sizeof(adapter->compare));

 

2207 adapter->compare.source = &adapter->clock;

 

2208 adapter->compare.target = ktime_get_real;

 

2209 adapter->compare.num_samples = 10;

 

2210 timecompare_update(&adapter->compare, 0);

 

2211 break;

 

2212 case e1000_82576:

 

2213 /*

 

2214 * Initialize hardware timer: we keep it running just in case

 

2215 * that some program needs it later on.

 

2216 */

 

2217 memset(&adapter->cycles, 0, sizeof(adapter->cycles));

 

2218 adapter->cycles.read = igb_read_clock;

 

2219 adapter->cycles.mask = CLOCKSOURCE_MASK(64);

 

2220 adapter->cycles.mult = 1;

 

2221 /**

 

2222 * Scale the NIC clock cycle by a large factor so that

 

2223 * relatively small clock corrections can be added or

 

2224 * substracted at each clock tick. The drawbacks of a large

 

2225 * factor are a) that the clock register overflows more quickly

 

2226 * (not such a big deal) and b) that the increment per tick has

 

2227 * to fit into 24 bits. As a result we need to use a shift of

 

2228 * 19 so we can fit a value of 16 into the TIMINCA register.

 

22...
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