10G ETHERNET MAC-10G Base R

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PCI Express*, Networking and Connectivity, Memory Interfaces, DSP IP, and Video IP

10G ETHERNET MAC-10G Base R

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Hi,

I'm using reference design example "10G EMAC-10G Base R" with Quartus 13.1 and Arria V GT Fpga. Simulation works fine. when i do compilation process, in Fitter(place and route) i'm getting Critical warning as below,

Critical Warning (11087): PMA direct channel(s) detected and needs to be constrained based on the guidelines in Arria V Device Handbook Volume 3: Transceiver chapter.

Have attached Pin Assignment of my design.

what could be the reason.?? Also i refered to Arria V device handbook but didn't get solution.

Please help me to solve this Issue.

thanks and regards

Vinod Kumar

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