FPGA Intellectual Property
PCI Express*, Networking and Connectivity, Memory Interfaces, DSP IP, and Video IP
6367 Discussions

10G ETHERNET MAC IP -10GBase-R Design example

Altera_Forum
Honored Contributor II
1,003 Views

Hello, 

In 10G E MAC example design which is available in Altera/IP/Ethernet/altera_eth_10g_design_example/altera_eth_10g_mac_base_r.  

In this example design 10G E MAC and 10G BASE-R Phy are used and if you observe in this document "https://www.altera.com/content/dam/altera-www/global/en_US/pdfs/literature/ug/10gbps_mac.pdf" page number 24, there are two PHY's.  

1. 10G BASE-R PHY/ XAUI PHY  

2.External PHY 

 

I'M confused with this External PHY. In the design example already there is 10GBASE -R PHY with 10G-EMAC, but why this External PHY is used. 

Please let me know the application of this external PHY. 

 

regards 

Vinod
0 Kudos
1 Reply
Altera_Forum
Honored Contributor II
244 Views

If not mistaken the IP allow use to instantiate only the MAC portion, then you will need to hook it up with external PHY chip.

0 Kudos
Reply