8 Channel ADC Data Processing

[Anomitra]

Hi,

We are looking for an FPGA which can accept 64 JESD204C data lines & process the data simultaneously from 8 input channels.

Does Intel have any such FPGA that can help us to reallize this architecture.

In case this kind of FPGA is not there, we want to know what is the highest number of JESD204C data lines that an existing FPGA can accept simultaneously.

[FvM]

Hi,
recent FPGA like Arria 10 and Stratix 10 provide up to 96 Gbit transceivers thus the ADC interface is feasible.

You didn't specify the total data throughput, I guess that streaming to SDRAM could be the bottleneck.

Regards,
Frank

[ZH_Intel]

Hi Anomitra,

Thank you for reaching out.

Apologize for the delayed response as we encounter some technical difficulty.

Thank you Frank you your explanation. Yes you are correct.

For JESD204C IP, it is only available with Intel Agilex 7 (E-tile) and Intel Stratix 10 (E-tile) devices.

Best Regards,

ZulsyafiqH_Intel